Pseudo Fifth-Generation Processors
There is at least one processor that, while generally regarded as a fifth-generation processor, lacks many of the functions of that class of chip—the IDT Centaur C6 Winchip. True fifth-generation chips would have multiple internal pipelines, which is called superscalar architecture, allowing more than one instruction to be processed at one time. They would also feature branch prediction, another fifth-generation chip feature. As it lacks these features, the C6 is more closely related to a 486; however, the performance levels and the pinout put it firmly in the class with Pentium processors. It has turned out to be an ideal Pentium Socket 7–compatible processor for low-end systems.
IDT Centaur C6 Winchip
The C6 processor is a recent offering from Centaur, a wholly owned subsidiary of IDT (Integrated Device Technologies). It is Socket 7–compatible with Intel's Pentium, includes MMX extensions, and is available at clock speeds of 180, 200, 225, and 240MHz. Pricing is below Intel on the Pentium MMX.
Centaur is led by Glenn Henry, who spent more than two decades as a computer architect at IBM and six years as chief technology officer at Dell Computer Corp. The company is a well-established semiconductor manufacturer well-known for SRAM and other components.
As a manufacturer, IDT owns its own fabs (semiconductor manufacturing plants), which will help keep costs low on the C6 Winchip. Its expertise in SRAM manufacturing may be applied in new versions of the C6, which integrate onboard L2 cache in the same package as the core processor, similar to the Pentium Pro.
The C6 has 32KB each of instruction and data cache, just like AMD's K6 and Cyrix's 6x86MX, yet it has only 5.4 million transistors, compared with the AMD chip's 8.8 million and the Cyrix chip's 6.5 million. This allows for a very small processor die, which also reduces power consumption. Centaur achieved this small size with a streamlined design. Unlike competitor chips, the C6 is not superscalar—it issues only one instruction per clock cycle like the 486. However, with large caches, an efficient memory-management unit, and careful performance optimization of commonly used instructions, the C6 achieves performance that's comparable to a Pentium. Another benefit of the C6's simple design is low power consumption—low enough for notebook PCs. Neither AMD nor Cyrix has a processor with power consumption low enough for most laptop designs.
To keep the design simple, Centaur compromised on floating-point and MMX speed and focused instead on typical application performance. As a result, the chip's performance trails the other competitors' on some multimedia applications and games.
Intel P6 (686) Sixth-Generation Processors
The P6 (686) processors represent a new generation with features not found in the previous generation units. The P6 processor family began when the Pentium Pro was released in November 1995. Since then, many other P6 chips have been released by Intel, all using the same basic P6 core processor as the Pentium Pro. Table 3.26 shows the variations in the P6 family of processors.
Table 3.26 Intel P6 Processor Variations
Pentium Pro
Original P6 processor, includes 256KB, 512KB, or 1MB of full-core speed L2 cache
Pentium II
P6 with 512KB of half-core speed L2 cache
Pentium II Xeon
P6 with 512KB, 1MB, or 2MB of full-core speed L2 cache
Celeron
P6 with no L2 cache
Celeron-A
P6 with 128KB of on-die full-core speed L2 cache
Pentium III
P6 with SSE (MMX2), 512KB of half-core speed L2 cache
Pentium IIPE
P6 with 256KB of full-core speed L2 cache
Pentium III Xeon
P6 with SSE (MMX2), 512KB, 1MB, or 2MB of full-core speed L2 cache
Even more are expected in this family, including versions of the Pentium III with on-die full-core speed L2 cache, and faster versions of the Celeron.
The main new feature in the fifth-generation Pentium processors was the superscalar architecture, where two instruction execution units could execute instructions simultaneously in parallel. Later fifth-generation chips also added MMX technology to the mix, as well. So then what did Intel add in the sixth-generation to justify calling it a whole new generation of chip? Besides many minor improvements, the real key features of all sixth-generation processors are Dynamic Execution and the Dual Independent Bus (DIB) architecture, plus a greatly improved superscalar design.
Dynamic Execution enables the processor to execute more instructions on parallel, so that tasks are completed more quickly. This technology innovation is comprised of three main elements:
Multiple branch prediction, to predict the flow of the program through several branches
Dataflow analysis, which schedules instructions to be executed when ready, independent of their order in the original program
Speculative execution, which increases the rate of execution by looking ahead of the program counter and executing instructions that are likely to be needed
Branch prediction is a feature formerly found only in high-end mainframe processors. It allows the processor to keep the instruction pipeline full while running at a high rate of speed. A special fetch/decode unit in the processor uses a highly optimized branch prediction algorithm to predict the direction and outcome of the instructions being executed through multiple levels of branches, calls, and returns. It is like a chess player working out multiple strategies in advance of game play by predicting the opponent's strategy several moves into the future. By predicting the instruction outcome in advance, the instructions can be executed with no waiting.
Dataflow analysis studies the flow of data through the processor to detect any opportunities for out-of-order instruction execution. A special dispatch/execute unit in the processor monitors many instructions and can execute these instructions in an order that optimizes the use of the multiple superscalar execution units. The resulting out-of-order execution of instructions can keep the execution units busy even when cache misses and other data-dependent instructions might otherwise hold things up.
Speculative execution is the processor's capability to execute instructions in advance of the actual program counter. The processor's dispatch/execute unit uses dataflow analysis to execute all available instructions in the instruction pool and store the results in temporary registers. A retirement unit then searches the instruction pool for completed instructions that are no longer data dependent on other instructions to run, or which have unresolved branch predictions. If any such completed instructions are found, the results are committed to memory by the retirement unit or the appropriate standard Intel architecture in the order they were originally issued. They are then retired from the pool.
Dynamic Execution essentially removes the constraint and dependency on linear instruction sequencing. By promoting out-of-order instruction execution, it can keep the instruction units working rather than waiting for data from memory. Even though instructions can be predicted and executed out of order, the results are committed in the original order so as not to disrupt or change program flow. This allows the P6 to run existing Intel architecture software exactly as the P5 (Pentium) and previous processors did, just a whole lot more quickly!
The other main P6 architecture feature is known as the Dual Independent Bus. This refers to the fact that the processor has two data buses, one for the system (motherboard) and the other just for cache. This allows the cache memory to run at speeds previously not possible.
Previous P5 generation processors have only a single motherboard host processor bus, and all data, including cache transfers, must flow through it. The main problem with that is the cache memory was restricted to running at motherboard bus speed, which was 66MHz until recently and has now moved to 100MHz. We have cache memory today that can run 500MHz or more, and main memory (SDRAM) that runs at 66 and 100MHz, so a method was needed to get faster memory closer to the processor. The solution was to essentially build in what is called a backside bus to the processor, otherwise known as a dedicated cache bus. The L2 cache would then be connected to this bus and could run at any speed. The first implementation of this was in the Pentium Pro, where the L2 cache was built right into the processor package and ran at the full-core processor speed. Later, that proved to be too costly, so the L2 cache was moved outside of the processor package and onto a cartridge module, which we now know as the Pentium II/III. With that design, the cache bus could run at any speed, with the first units running the cache at half-processor speed.
By having the cache on a backside bus directly connected to the processor, the speed of the cache is scalable to the processor. In current PC architecture—66MHz Pentiums all the way through the 333MHz Pentium IIs—the motherboard runs at a speed of 66MHz. Newer Pentium II systems run a 100MHz motherboard bus and have clock speeds of 350MHz and higher. If the cache were restricted to the motherboard as is the case with Socket 7 (P5 processor) designs, the cache memory would have to remain at 66MHz, even though the processor was running as fast as 333MHz. With newer boards, the cache would be stuck at 100MHz, while the processor ran as fast as 500MHz or more. With the Dual Independent Bus (DIB) design in the P6 processors, as the processor runs faster, at higher multiples of the motherboard speed, the cache would increase by the same amount that the processor speed increases. The cache on the DIB is coupled to processor speed, so that doubling the speed of the processor also doubles the speed of the cache.
The DIB architecture is necessary to have decent processor performance in the 300MHz and beyond range. Older Socket 7 (P5 processor) designs will not be capable of moving up to these higher speeds without suffering a tremendous performance penalty due to the slow motherboard-bound L2 cache. That is why Intel is not developing any Pentium (P5 class) processors beyond 266MHz; however, the P6 processors will be available in speeds of up to 500MHz or more.
Finally, the P6 architecture upgrades the superscalar architecture of the P5 processors by adding more instruction execution units, and by breaking down the instructions into special micro-ops. This is where the CISC (Complex Instruction Set Computer) instructions are broken down into more RISC (Reduced Instruction Set Computer) commands. The RISC-level commands are smaller and easier for the parallel instruction units to execute more efficiently. With this design, Intel has brought the benefits of a RISC processor—high-speed dedicated instruction execution—to the CISC world. Note that the P5 had only two instruction units, while the P6 has at least six separate dedicated instruction units. It is said to be three-way superscalar, because the multiple instruction units can execute up to three instructions in one cycle.
Other improvements in efficiency also are included in the P6 architecture: built-in multiprocessor support, enhanced error detection and correction circuitry, and optimization for 32-bit software.
Rather than just being a faster Pentium, the Pentium Pro, Pentium II/III, and other sixth- generation processors have many feature and architectural improvements. The core of the chip is very RISC-like, while the external instruction interface is classic Intel CISC. By breaking down the CISC instructions into several different RISC instructions and running them down parallel execution pipelines, the overall performance is increased.
Compared to a Pentium at the same clock speed, the P6 processors are faster—as long as you're running 32-bit software. The P6 Dynamic Execution is optimized for performance primarily when running 32-bit software such as Windows NT. If you are using 16-bit software, such as Windows 95 or 98 (which operate part time in a 16-bit environment) and most older applications, the P6 will not provide as marked a performance improvement over similarly speed-rated Pentium and Pentium-MMX processors. That's because the Dynamic Execution capability will not be fully exploited. Because of this, Windows NT is often regarded as the most desirable operating system for use with Pentium Pro/II/III/Celeron processors. While this is not exactly true (a Pentium Pro/II/III/Celeron will run fine under Windows 95/98), Windows NT does take better advantage of the P6's capabilities. Note that it is really not so much the operating system but which applications you use. Software developers can take steps to gain the full advantages of the sixth-generation processors. This includes using modern compilers that can improve performance for all current Intel processors, writing 32-bit code where possible, and making code as predictable as possible to take advantage of the processor's Dynamic Execution multiple branch prediction capabilities.
Pentium Pro Processors
Intel's successor to the Pentium is called the Pentium Pro. The Pentium Pro was the first chip in the P6 or sixth-generation processor family. It was introduced in November 1995 and became widely available in 1996. The chip is a 387-pin unit that resides in Socket 8, so it is not pin-compatible with earlier Pentiums. The new chip is unique among processors as it is constructed in a Multi-Chip Module (MCM) physical format, which Intel is calling a Dual Cavity PGA (Pin Grid Array) package. Inside the 387-pin chip carrier are two dies. One contains the actual Pentium Pro processor (shown in Figure 3.36), and the other a 256KB (the Pentium Pro with 256KB cache is shown in Figure 3.37), 512KB, or 1MB (the Pentium Pro with 1MB cache is shown in Figure 3.37) L2 cache. The processor die contains 5.5 million transistors, the 256KB cache die contains 15.5 million transistors, and the 512KB cache die(s) have 31 million transistors each, for a potential total of nearly 68 million transistors in a Pentium Pro with 1MB of internal cache! A Pentium Pro with 1MB cache has two 512KB cache die and a standard P6 processor die (see Figure 3.38).
Figure 3.36 Pentium Pro processor die. Photograph used by permission of Intel Corporation.
Figure 3.37 Pentium Pro processor with 256KB L2 cache (the cache is on the left side of the processor die). Photograph used by permission of Intel Corporation.
Figure 3.38 Pentium Pro processor with 1MB L2 cache (the cache is in the center and right portions of the die). Photograph used by permission of Intel Corporation.
The main processor die includes a 16KB split L1 cache with an 8KB two-way set associative cache for primary instructions and an 8KB four-way set associative cache for data.
Another sixth-generation processor feature found in the Pentium Pro is the Dual Independent Bus (DIB) architecture, which addresses the memory bandwidth limitations of previous-generation processor architectures. Two buses make up the DIB architecture: the L2 cache bus (contained entirely within the processor package) and the processor-to-main memory system bus. The speed of the dedicated L2 cache bus on the Pentium Pro is equal to the full-core speed of the processor. This was accomplished by embedding the cache chips directly into the Pentium Pro package. The DIB processor bus architecture addresses processor-to-memory bus bandwidth limitations. It offers up to three times the performance bandwidth of the single-bus, "Socket 7" generation processors, such as the Pentium.
Table 3.27 shows Pentium Pro processor specifications. Table 3.28 shows the specifications for each model within the Pentium Pro family, as there are many variations from model to model.
Table 3.27 Pentium Pro Family Processor Specifications
Introduced
November 1995
Maximum rated speeds
150, 166, 180, 200MHz
CPU
2.5x, 3x
Internal registers
32-bit
External data bus
64-bit
Memory address bus
36-bit
Addressable memory
64GB
Virtual memory
64TB
Integral L1-cache size
8KB code, 8KB data (16KB total)
Integrated L2-cache bus
64-bit, full-core speed
Socket/Slot
Socket 8
Physical package
387-pin Dual Cavity PGA
Package dimensions
2.46 (6.25cm) x 2.66 (6.76cm)
Math coprocessor
Built-in FPU
Power management
SMM (system management mode)
Operating voltage
3.1v or 3.3v
Table 3.28 Pentium Pro Processor Specifications by Processor Model
Pentium Pro Processor (200MHz) with 1MB Integrated Level 2 Cache
Introduction date
August 18, 1997
Clock speeds
200MHz (66MHz x 3)
Number of transistors
5.5 million (0.35 micron process), plus 62 million in 1MB L2 cache (0.35 micron)
Cache Memory
8Kx2 (16KB) L1, 1MB core-speed L2
Die size
0.552 (14.0mm)
Pentium Pro Processor (200MHz)
Introduction date
November 1, 1995
Clock speeds
200MHz (66MHz x 3)
iCOMP Index 2.0 rating
220
Number of transistors
5.5 million (0.35 micron process), plus 15.5 million in 256KB L2 cache (0.6 micron), or 31 million in 512KB L2 cache (0.35 micron)
Cache Memory
8Kx2 (16KB) L1, 256KB or 512KB core-speed L2
Die size
0.552 inches per side (14.0mm)
Pentium Pro Processor (180MHz)
Introduction date
November 1, 1995
Clock speeds
180MHz (60MHz x 3)
iCOMP Index 2.0 rating
197
Number of transistors
5.5 million (0.35 micron process), plus 15.5 million in 256KB L2 cache (0.6 micron)
Cache Memory
8Kx2 (16KB) L1, 256KB core-speed L2
Die size
0.552 inches per side (14.0mm)
Pentium Pro Processor (166MHz)
Introduction date
November 1, 1995
Clock speeds
166MHz (66MHz x 2.5)
Number of transistors
5.5 million (0.35 micron process), plus 31 million in 512KB L2 cache (0.35 micron)
Cache Memory
8Kx2 L1, 512KB core-speed L2
Die size
0.552 inches per side (14.0mm)
Pentium Pro Processor (150MHz)
Introduction date
November 1, 1995
Clock speeds
150MHz (60MHz x 2.5)
Number of transistors
5.5 million (0.6 micron process), plus 15.5 million in 256KB L2 cache (0.6 micron)
Cache Memory
8Kx2 speed L2
Die size
0.691 inches per side (17.6mm)
As you saw in Table 3.5, performance comparisons on the iCOMP 2.0 Index rate a classic Pentium 200MHz at 142, whereas a Pentium Pro 200MHz scores an impressive 220. Just for comparison, note that a Pentium MMX 200MHz falls right about in the middle in regards to performance at 182. Keep in mind that using a Pentium Pro with any 16-bit software applications will nullify much of the performance gain shown by the iCOMP 2.0 rating.
Like the Pentium before it, the Pentium Pro runs clock multiplied on a 66MHz motherboard. The following table lists speeds for Pentium Pro processors and motherboards.
CPU Type/Speed
CPU Clock
Motherboard Speed
Pentium Pro 150
2.5x
60
Pentium Pro 166
2.5x
66
Pentium Pro 180
3x
60
Pentium Pro 200
3x
66
The integrated L2 cache is one of the really outstanding features of the Pentium Pro. By building the L2 cache into the CPU and getting it off the motherboard, the Pentium Pro can now run the cache at full processor speed rather than the slower 60 or 66MHz motherboard bus speeds. In fact, the L2 cache features its own internal 64-bit backside bus, which does not share time with the external 64-bit frontside bus used by the CPU. The internal registers and data paths are still 32-bit, as with the Pentium. By building the L2 cache into the system, motherboards can be cheaper because they no longer require separate cache memory. Some boards may still try to include cache memory in their design, but the general consensus is that L3 cache (as it would be called) would offer less improvement with the Pentium Pro than with the Pentium.
One of the features of the built-in L2 cache is that multiprocessing is greatly improved. Rather than just SMP, as with the Pentium, the Pentium Pro supports a new type of multiprocessor configuration called the Multiprocessor Specification (MPS 1.1). The Pentium Pro with MPS allows configurations of up to four processors running together. Unlike other multiprocessor configurations, the Pentium Pro avoids cache coherency problems because each chip maintains a separate L1 and L2 cache internally.
Pentium Pro–based motherboards are pretty much exclusively PCI and ISA bus-based, and Intel is producing its own chipsets for these motherboards. The first chipset was the 450KX/GX (code-named Orion), while the most recent chipset for use with the Pentium Pro is the 440LX (Natoma). Due to the greater cooling and space requirements, Intel designed the new ATX motherboard form factor to better support the Pentium Pro and other future processors, such as the Pentium II. Even so, the Pentium Pro can be found in all types of motherboard designs; ATX is not mandatory.
Some Pentium Pro system manufacturers have been tempted to stick with the Baby-AT form factor. The big problem with the standard Baby-AT form factor is keeping the CPU properly cooled. The massive Pentium Pro processor consumes more than 25 watts and generates an appreciable amount of heat.
Four special Voltage Identification (VID) pins are on the Pentium Pro processor. These pins can be used to support automatic selection of power supply voltage. This means that a Pentium Pro motherboard does not have voltage regulator jumper settings like most Pentium boards, which greatly eases the setup and integration of a Pentium Pro system. These pins are not actually signals, but are either an open circuit in the package or a short circuit to voltage. The sequence of opens and shorts define the voltage required by the processor. In addition to allowing for automatic voltage settings, this feature has been designed to support voltage specification variations on future Pentium Pro processors. The VID pins are named VID0 through VID3 and the definition of these pins is shown in Table 3.29. A 1 in this table refers to an open pin and 0 refers to a short to ground. The voltage regulators on the motherboard should supply the voltage that is requested or disable itself.
Table 3.29 Pentium Pro Voltage Identification Definition
VID[3:0]
Voltage Setting
VID[3:0]
Voltage Setting
0000
3.5
1000
2.7
0001
3.4
1001
2.6
0010
3.3
1010
2.5
0011
3.2
1011
2.4
0100
3.1
1100
2.3
0101
3.0
1101
2.2
0110
2.9
1110
2.1
0111
2.8
1111
No CPU present
Most Pentium Pro processors run at 3.3v, but a few run at 3.1v. Although those are the only versions available now, support for a wider range of VID settings will benefit the system in meeting the power requirements of future Pentium Pro processors. Note that the 1111 (or all opens) ID can be used to detect the absence of a processor in a given socket.
The Pentium Pro never did become very popular on the desktop but has found a niche in file server applications due primarily to the full-core speed high-capacity internal L2 cache.
Pentium II Processors
Intel revealed the Pentium II in May 1997. Prior to its official unveiling, the Pentium II processor was popularly referred to by its code name Klamath, and was surrounded by much speculation throughout the industry. The Pentium II is essentially the same sixth-generation processor as the Pentium Pro, with MMX technology added (which included double the L1 cache and 57 new MMX instructions); however, there are a few twists to the design. The Pentium II processor die is shown in Figure 3.39.
Figure 3.39 Pentium II Processor die. Photograph used by permission of Intel Corporation.
From a physical standpoint, it is truly something new. Abandoning the chip in a socket approach used by virtually all processors up until this point, the Pentium II chip is characterized by its Single Edge Contact (SEC) cartridge design. The processor, along with several L2 cache chips, is mounted on a small circuit board (much like an oversized-memory SIMM) as shown in Figure 3.40, which is then sealed in a metal and plastic cartridge. The cartridge is then plugged into the motherboard through an edge connector called Slot 1, which looks very much like an adapter card slot.
There are two variations on these cartridges, called SECC (Single Edge Contact Cartridge) and SECC2. Figure 3.41 shows a diagram of the SECC package. Figure 3.42 shows the SECC2 package.
Figure 3.40 Pentium II Processor Board (inside SEC cartridge). Photograph used by permission of Intel Corporation.
Figure 3.41 SECC components showing enclosed processor board.
Figure 3.42 2 Single Edge Contact Cartridge, rev. 2 components showing half-enclosed processor board.
As you can see from these figures, the SECC2 version is cheaper to make because it uses fewer overall parts. It also allows for a more direct heat sink attachment to the processor for better cooling. Intel transitioned from SECC to SECC2 in the beginning of 1999; all newer PII/PIII cartridge processors use the improved SECC2 design.
By using separate chips mounted on a circuit board, Intel can build the Pentium II much less expensively than the multiple die within a package used in the Pentium Pro. Intel can also use cache chips from other manufacturers, and more easily vary the amount of cache in future processors compared to the Pentium Pro design.
Intel has offered Pentium II processors with the following speeds:
CPU Type/Speed
CPU Clock
Motherboard Speed
Pentium II 233MHz
3.5x
66MHz
Pentium II 266MHz
4x
66MHz
Pentium II 300MHz
4.5x
66MHz
Pentium II 333MHz
5x
66MHz
Pentium II 350MHz
3.5x
100MHz
Pentium II 400MHz
4x
100MHz
Pentium II 450MHz
4.5x
100MHz
The Pentium II processor core has 7.5 million transistors and is based on Intel's advanced P6 architecture. The Pentium II started out using .35 micron process technology, although the 333MHz and faster Pentium IIs are based on 0.25 micron technology. This enables a smaller die, allowing increased core frequencies and reduced power consumption. At 333MHz, the Pentium II processor delivers a 75–150 percent performance boost, compared to the 233MHz Pentium processor with MMX technology, and approximately 50 percent more performance on multimedia benchmarks. These are very fast processors, at least for now. As shown in Table 3.3, the iCOMP 2.0 Index rating for the Pentium II 266MHz chip is more than twice as fast as a classic Pentium 200MHz.
Aside from speed, the best way to think of the Pentium II is as a Pentium Pro with MMX technology instructions and a slightly modified cache design. It has the same multiprocessor scalability as the Pentium Pro, as well as the integrated L2 cache. The 57 new multimedia-related instructions carried over from the MMX processors and the capability to process repetitive loop commands more efficiently are also included. Also included as a part of the MMX upgrade is double the internal L1 cache from the Pentium Pro (from 16KB total to 32KB total in the Pentium II).
The original Pentium II processors were manufactured using a 0.35 micron process. More recent models, starting with the 333MHz version, have been manufactured using a newer 0.25 micron process. Intel is considering going to a 0.18 micron process in the future. By going to the smaller process, power draw is greatly reduced.
Maximum power usage for the Pentium II is shown in the following table.
Core Speed
Power Draw
Process
Voltage
450MHz
27.1w
0.25 micron
2.0v
400MHz
24.3w
0.25 micron
2.0v
350MHz
21.5w
0.25 micron
2.0v
333MHz
23.7w
0.25 micron
2.0v
300MHz
43.0w
0.35 micron
2.8v
266MHz
38.2w
0.35 micron
2.8v
233MHz
34.8w
0.35 micron
2.8v
You can see that the highest speed 450MHz version of the Pentium II actually uses less power than the slowest original 233MHz version! This was accomplished by using the smaller 0.25 micron process and running the processor on a lower voltage of only 2.0v. Future Pentium III processors will use the 0.25- and 0.18 micron processes and even lower voltages to continue this trend.
The Pentium II includes Dynamic Execution, which describes unique performance-enhancing developments by Intel and was first introduced in the Pentium Pro processor. Major features of Dynamic Execution include Multiple Branch Prediction, which speeds execution by predicting the flow of the program through several branches; Dataflow Analysis, which analyzes and modifies the program order to execute instructions when ready; and Speculative Execution, which looks ahead of the program counter and executes instruction that are likely to be needed. The Pentium II processor expands on these capabilities in sophisticated and powerful new ways to deliver even greater performance gains.
Like the Pentium Pro, the Pentium II also includes DIB architecture. The term Dual Independent Bus comes from the existence of two independent buses on the Pentium II processor—the L2 cache bus and the processor-to-main-memory system bus. The Pentium II processor can use both buses simultaneously, thus getting as much as twice as much data in and out of the Pentium II processor than a single-bus architecture processor. The DIB architecture enables the L2 cache of the 333MHz Pentium II processor to run 2 1/2 times as fast as the L2 cache of Pentium processors. As the frequency of future Pentium II processors increases, so will the speed of the L2 cache. Also, the pipelined system bus enables simultaneous parallel transactions instead of singular sequential transactions. Together, these DIB architecture improvements offer up to three times the bandwidth performance over a single-bus architecture as with the regular Pentium.
Table 3.30 shows the general Pentium II processor specifications. Table 3.31 shows the specifications that vary by model for the models that have been introduced to date.
Table 3.30 Pentium II General Processor Specifications
Bus Speeds
66MHz, 100MHz
CPU clock multiplier
3.5x, 4x, 4.5x, 5x
CPU speeds
233MHz, 266MHz, 300MHz, 333MHz, 350MHz, 400MHz, 450MHz
Cache memory
16Kx2 (32KB) L1, 512KB 1/2-speed L2
Internal registers
32-bit
Bus Speeds
66MHz, 100MHz
External data bus
64-bit system bus w/ ECC; 64-bit cache bus w/ optional ECC
Memory address bus
36-bit
Addressable memory
64GB
Virtual memory
64TB
Physical package
Single Edge Contact Cartridge (S.E), 242 pins
Package dimensions
5.505 in. (12.82cm)x2.473 inches (6.28cm)x0.647 in. (1.64cm)
Math coprocessor
Built-in FPU (floating-point unit)
Power management
SMM (System Management Mode)
Table 3.31 Pentium II Specifications by Model
Pentium II MMX Processor (350, 400, and 450MHz)
Introduction date
April 15, 1998
Clock speeds
350MHz (100MHzx3.5), 400MHz (100MHz x4), and 450MHz (100MHzx4.5)
iCOMP Index 2.0 rating
386 (350MHz), 440 (400MHz), and 483 (450MHz)
Number of transistors
7.5 million (0.25 micron process), plus 31 million in 512KB L2 cache
Cacheable RAM
4GB
Operating voltage
2.0v
Slot
Slot 2
Die size
0.400 inches per side (10.2mm)
Mobile Pentium II Processor (266, 300, 333, and 366MHz)
Introduction date
January 25, 1999
Clock speeds
266, 300, 333, and 366MHz
Number of transistors
27.4 million (0.25 micron process), 256KB on-die L2 cache
Ball Grid Array (BGA)
Number of balls = 615
Dimensions
Width = 31mm; Length = 35mm
Core voltage
1.6 volts
Thermal design power ranges by frequency
366MHz = 9.5 watts; 333MHz = 8.6 watts; 300MHz = 7.7 watts; 266MHz = 7.0 watts
Pentium II MMX Processor (333MHz)
Introduction date
January 26, 1998
Clock speeds
333MHz (66MHzx5)
iCOMP Index 2.0 rating
366
Number of transistors
7.5 million (0.25 micron process), plus 31 million in 512KB L2 cache
Cacheable RAM
512MB
Operating voltage
2.0v
Slot
Slot 1
Die size
0.400 inches per side (10.2mm)
Pentium II MMX Processor (300MHz)
Introduction date
May 7, 1997
Clock speeds
300MHz (66MHzx4.5)
iCOMP Index 2.0 rating
332
Number of transistors
7.5 million (0.35 micron process), plus 31 million in 512KB L2 cache
Cacheable RAM
512MB
Die size
0.560 inches per side (14.2mm)
Pentium II MMX Processor (266MHz)
Introduction date
May 7, 1997
Clock speeds
266MHz (66MHzx4)
iCOMP Index 2.0 rating
303
Number of transistors
7.5 million (0.35 micron process), plus 31 million in 512KB L2 cache
Cacheable RAM
512MB
Slot
Slot 1
Die size
0.560 inches per side (14.2mm)
Pentium II MMX Processor (233MHz)
Introduction date
May 7, 1997
Clock speeds
233MHz (66MHzx3.5)
iCOMP Index 2.0 rating
267
Number of transistors
7.5 million (0.35 micron process), plus 31 million in 512KB L2 cache
Cacheable RAM
512MB
Slot
Slot 1
Die size
0.560 inches per side (14.2mm)
As you can see from the table, the Pentium II can handle up to 64GB of physical memory. Like the Pentium Pro, the CPU incorporates Dual Independent Bus architecture. This means the chip has two independent buses: one for accessing the L2 cache, the other for accessing main memory. These dual buses can operate simultaneously, greatly accelerating the flow of data within the system. The L1 cache always runs at full-core speeds because it is mounted directly on the processor die. The L2 cache in the Pentium II normally runs at half-core speed, which saves money and allows for less expensive cache chips to be used. For example, in a 333MHz Pentium II, the L1 cache runs at a full 333MHz, while the L2 cache runs at 167MHz. Even though the L2 cache is not at full-core speed as it was with the Pentium Pro, this is still far superior to having cache memory on the motherboard running at the 66MHz motherboard speed of most Socket 7 Pentium designs. Intel claims that the DIB architecture in the Pentium II allows up to three times the bandwidth of normal single-bus processors like the original Pentium.
By removing the cache from the processor's internal package and using external chips mounted on a substrate and encased in the cartridge design, Intel can now use more cost-effective cache chips and more easily scale the processor up to higher speeds. The Pentium Pro was limited in speed to 200MHz, largely due to the inability to find affordable cache memory that runs any faster. By running the cache memory at half-core speed, the Pentium II can run up to 400MHz while still using 200MHz rated cache chips. To offset the half-core speed cache used in the Pentium II, Intel doubled the basic amount of integrated L2 cache from 256KB standard in the Pro to 512KB standard in the Pentium II.
Note that the tag-RAM included in the L2 cache will allow up to 512MB of main memory to be cacheable in PII processors from 233MHz to 333MHz. The 350MHz, 400MHz, and faster versions include an enhanced tag-RAM that allows up to 4GB of main memory to be cacheable. This is very important if you ever plan on adding more than 512MB of memory. In that case, you would definitely want the 350MHz or faster version; otherwise, memory performance would suffer.
The system bus of the Pentium II provides "glueless" support for up to two processors. This enables low-cost, two-way multiprocessing on the L2 cache bus. These system buses are designed especially for servers or other mission-critical system use where reliability and data integrity are important. All Pentium IIs also include parity-protected address/request and response system bus signals with a retry mechanism for high data integrity and reliability.
To install the Pentium II in a system, a special processor-retention mechanism is required. This consists of a mechanical support that attaches to the motherboard and secures the Pentium II processor in Slot 1 to prevent shock and vibration damage. Retention mechanisms should be provided by the motherboard manufacturer. (For example, the Intel Boxed AL440FX and DK440LX motherboards include a retention mechanism, plus other important system integration components.)
The Pentium II can generate a significant amount of heat that must be dissipated. This is accomplished by installing a heat sink on the processor. Many of the Pentium II processors will use an active heat sink that incorporates a fan. Unlike heat sink fans for previous Intel boxed processors, the Pentium II fans draw power from a three-pin power header on the motherboard. Most motherboards provide several fan connectors to supply this power.
Special heat sink supports are needed to furnish mechanical support between the fan heat sink and support holes on the motherboard. Normally, a plastic support is inserted into the heat sink holes in the motherboard next to the CPU, before installing the CPU/heat sink package. Most fan heat sinks have two components: a fan in a plastic shroud and a metal heat sink. The heat sink is attached to the processor's thermal plate and should not be removed. The fan can be removed and replaced if necessary—for example, if it has failed. Figure 3.43 shows the SEC assembly with fan, power connectors, mechanical supports, and the slot and support holes on the motherboard.
Figure 3.43 Pentium II/III processor and heat sink assembly.
The following tables show the specifications unique to certain versions of the Pentium II processor.
To identify exactly which Pentium II processor you have and what its capabilities are, look at the specification number printed on the SEC cartridge. You will find the specification number in the dynamic mark area on the top of the processor module. See Figure 3.44 to locate these markings.
After you have located the specification number (actually, it is an alphanumeric code), you can look it up in Table 3.32 to see exactly which processor you have.
Figure 3.44 Pentium II/III Single Edge Contact Cartridge.
For example, a specification number of SL2KA identifies the processor as a Pentium II 333MHz running on a 66MHz system bus, with an ECC L2 cache—and that this processor runs on only 2.0 volts. The stepping is also identified, and by looking in the Pentium II Specification Update Manual published by Intel, you could figure out exactly which bugs were fixed in that revision.
Table 3.32 Basic Pentium II Processor Identification Information
S-spec
Core Stepping
CPUID
Core/Bus Speed (MHz)
L2 Cache Size (MB)
L2 Cache Type
CPU Package
Notes (see footnotes)
SL264
C0
0633h
233/66
512
non-ECC
SECC 3.00
16
SL265
C0
0633h
266/66
512
non-ECC
SECC 3.00
16
SL268
C0
0633h
233/66
512
ECC
SECC 3.00
16
SL269
C0
0633h
266/66
512
ECC
SECC 3.00
16
SL28K
C0
0633h
233/66
512
non-ECC
SECC 3.00
12, 14, 16
SL28L
C0
0633h
266/66
512
non-ECC
SECC 3.00
12, 14, 16
SL28R
C0
0633h
300/66
512
ECC
SECC 3.00
16
SL2MZ
C0
0633h
300/66
512
ECC
SECC 3.00
12, 16
SL2HA
C1
0634h
300/66
512
ECC
SECC 3.00
16
SL2HC
C1
0634h
266/66
512
non-ECC
SECC 3.00
16
SL2HD
C1
0634h
233/66
512
non-ECC
SECC 3.00
16
SL2HE
C1
0634h
266/66
512
ECC
SECC 3.00
16
SL2HF
C1
0634h
233/66
512
ECC
SECC 3.00
16
SL2QA
C1
0634h
233/66
512
non-ECC
SECC 3.00
12, 14, 16
SL2QB
C1
0634h
266/66
512
non-ECC
SECC 3.00
12, 14, 16
SL2QC
C1
0634h
300/66
512
ECC
SECC 3.00
12, 16
SL2KA
dA0
0650h
333/66
512
ECC
SECC 3.00
16
SL2QF
dA0
0650h
333/66
512
ECC
SECC 3.00
12
SL2K9
dA0
0650h
266/66
512
ECC
SECC 3.00
SL35V
dA1
0651h
300/66
512
ECC
SECC 3.00
12, 13
SL2QH
dA1
0651h
333/66
512
ECC
SECC 3.00
12, 13
SL2S5
dA1
0651h
333/66
512
ECC
SECC 3.00
13, 16
SL2ZP
dA1
0651h
333/66
512
ECC
SECC 3.00
13, 16
SL2ZQ
dA1
0651h
350/100
512
ECC
SECC 3.00
13, 16
SL2S6
dA1
0651h
350/100
512
ECC
SECC 3.00
13, 16
SL2S7
dA1
0651h
400/100
512
ECC
SECC 3.00
13, 16
SL2SF
dA1
0651h
350/100
512
ECC
SECC 3.00
12, 13
SL2SH
dA1
0651h
400/100
512
ECC
SECC 3.00
12, 13
SL2VY
dA1
0651h
300/66
512
ECC
SECC 3.00
12, 13
SL33D
dB0
0652h
266/66
512
ECC
SECC 3.00
12, 13, 16
SL2YK
dB0
0652h
300/66
512
ECC
SECC 3.00
12, 13, 16
SL2WZ
dB0
0652h
350/100
512
ECC
SECC 3.00
12, 13, 16
SL2YM
dB0
0652h
400/100
512
ECC
SECC 3.00
12, 13, 16
SL37G
dB0
0652h
400/100
512
ECC
SECC2 OLGA
12, 13, 15
SL2WB
dB0
0652h
450/100
512
ECC
SECC 3.00
12, 13, 16
SL37H
dB0
0652h
450/100
512
ECC
SECC2 OLGA
12, 13
SL2KE
TdB0
1632h
333/66
512
ECC
PGA
13, 15
SL2W7
dB0
0652h
266/66
512
ECC
SECC 2.00
13, 16
SL2W8
dB0
0652h
300/66
512
ECC
SECC 3.00
13, 16
SL2TV
dB0
0652h
333/66
512
ECC
SECC 3.00
13, 16
SL2U3
dB0
0652h
350/100
512
ECC
SECC 3.00
13, 16
SL2U4
dB0
0652h
350/100
512
ECC
SECC 3.00
13, 16
SL2U5
dB0
0652h
400/100
512
ECC
SECC 3.00
13, 16
SL2U6
dB0
0652h
400/100
512
ECC
SECC 3.00
13, 16
SL2U7
dB0
0652h
450/100
512
ECC
SECC 3.00
13, 16
SL356
dB0
0652h
350/100
512
ECC
SECC2 PLGA
13, 16
SL357
dB0
0652h
400/100
512
ECC
SECC2 OLGA
13, 16
SL358
dB0
0652h
450/100
512
ECC
SECC2 OLGA
13, 16
SL37F
dB0
0652h
350/100
512
ECC
SECC2 PLGA
12, 13, 16
SL3FN
dB0
0652h
350/100
512
ECC
SECC2 OLGA
13, 16
SL3EE
dB0
0652h
400/100
512
ECC
SECC2 PLGA
13, 16
SL3F9
dB0
0652h
400/100
512
ECC
SECC2 PLGA
12, 13
SL38M
dB1
0653h
350/100
512
ECC
SECC 3.00
12, 13, 16
SL38N
dB1
0653h
400/100
512
ECC
SECC 3.00
12, 13, 16
SL36U
dB1
0653h
350/100
512
ECC
SECC 3.00
13, 16
SL38Z
dB1
0653h
400/100
512
ECC
SECC 3.00
13, 16
SL3D5
dB1
0653h
400/100
512
ECC
SECC2 OLGA
12, 13
SECC = Single Edge Contact Cartridge
SECC2 = Single Edge Contact Cartridge revision 2
PLGA = Plastic Land Grid Array
OLGA = Organic Land Grid Array
CPUID = The internal ID returned by the CPUID instruction
ECC = Error Correcting Code
The two variations of the SECC2 cartridge vary by the type of processor core package on the board. The PLGA (Plastic Land Grid Array) is the older type of packaging used in previous SECC cartridges as well and is being phased out. Taking its place is the newer OLGA (Organic Land Grid Array), which is a processor core package that is smaller and easier to manufacture. It also allows better thermal transfer between the processor die and the heat sink, which is attached directly to the top of the OLGA chip package. Figure 3.45 shows the open back side (where the heat sink would be attached) of SECC2 processors with PLGA and OLGA cores.
Figure 3.45 SECC2 processors with PLGA and OLGA cores.
Pentium II motherboards have an onboard voltage regulator circuit that is designed to power the CPU. Currently, there are Pentium II processors that run at several different voltages, so the regulator must be set to supply the correct voltage for the specific processor you are installing. As with the Pentium Pro and unlike the older Pentium, there are no jumpers or switches to set; the voltage setting is handled completely automatically through the Voltage ID (VID) pins on the processor cartridge. Table 3.33 shows the relationship between the pins and the selected voltage.
Table 3.33 Slot 1 and Socket 370 Voltage ID Pin Definitions
VID4
VID3
VID2
VID1
VID0
Voltage
0
1
1
1
1
1.30
0
1
1
1
0
1.35
0
1
1
0
1
1.40
0
1
1
0
0
1.45
0
1
0
1
1
1.50
0
1
0
1
0
1.55
0
1
0
0
1
1.60
0
1
0
0
0
1.65
0
0
1
1
1
1.70
0
0
1
1
0
1.75
0
0
1
0
1
1.80
0
0
1
0
0
1.85
0
0
0
1
1
1.90
0
0
0
1
0
1.95
0
0
0
0
1
2.00
0
0
0
0
0
2.05
1
1
1
1
1
No Core
1
1
1
1
0
2.1
1
1
1
0
1
2.2
1
1
1
0
0
2.3
1
1
0
1
1
2.4
1
1
0
1
0
2.5
1
1
0
0
1
2.6
1
1
0
0
0
2.7
1
0
1
1
1
2.8
1
0
1
1
0
2.9
1
0
1
0
1
3.0
1
0
1
0
0
3.1
1
0
0
1
1
3.2
1
0
0
1
0
3.3
1
0
0
0
1
3.4
1
0
0
0
0
3.5
0 = Processor pin connected to Vss
1 = Open on processor
VID0-VID3 used on Socket 370
Socket 370 supports 1.30V through 2.05V settings only.
VID0-VID4 used on Slot 1
Slot 1 supports 1.30V through 3.5V settings.
To ensure the system is ready for all Pentium II processor variations, the values in bold must be supported. Most Pentium II processors run at 2.8v, with some newer ones at 2.0v.
The Pentium II Mobile Module is a Pentium II for notebooks that includes the North Bridge of the high-performance 440BX chipset. This is the first chipset on the market that allows 100MHz processor bus operation, although that is currently not supported in the mobile versions. The 440BX chipset was released at the same time as the 350 and 400MHz versions of the Pentium II; it is the recommended minimum chipset for any new Pentium II motherboard purchases.
See "Mobile Pentium II and III."
Newer variations on the Pentium II include the Pentium IIPE, which is a mobile version that includes 256KB of L2 cache directly integrated into the die. This means that it runs at full-core speed, making it faster than the desktop Pentium II, because the desktop chips use half-speed L2 cache.
Celeron
The Celeron processor is a P6 with the same processor core as the Pentium II in the original two versions and now the same core as the PIII in the latest version. It is mainly designed for lower-cost PCs in the $1,000 or less price category. The best "feature" is that although the cost is low, the performance is not. In fact, due to the superior cache design, the Celeron outperforms the Pentium II at the same speed and at a lower cost.
Most of the features for the Celeron are the same as the Pentium II and III because it uses the same internal processor core. The main differences are in packaging and L2 cache design.
Up until recently, all Celeron processors were available in a package called the Single Edge Processor Package (SEPP or SEP package). The SEP package is basically the same Slot 1 design as the SECC (Single Edge Contact Cartridge) used in the Pentium II/III, with the exception of the fancy plastic cartridge cover. This cover is deleted in the Celeron, making it cheaper to produce and sell. Essentially the Celeron uses the same circuit board as is inside the Pentium II package.
See "Single Edge Contact (SEC) and Single Edge Processor (SEP) Packaging."
Even without the plastic covers, the Slot 1 packaging was more expensive than it should be. This was largely due to the processor retention mechanisms (stands) required to secure the processor into Slot 1 on the motherboard, as well as the larger and more complicated heat sinks required. This, plus competition from the lower-end Socket 7 systems using primarily AMD processors, led Intel to introduce the Celeron in a socketed form. The socket is called PGA-370 or Socket 370, because it has 370 pins. The processor package designed for this socket is called the Plastic Pin Grid Array (PPGA) package (see Figure 3.46) or FC-PGA (Flip Chip PGA). Both the PPGA and FC-PGA packages plug into the 370 pin socket and allows for lower-cost, lower-profile, and smaller systems because of the less expensive processor retention and cooling requirements of the socketed processor.
Figure 3.46 Celeron processors in the FC-PGA, PPGA, and SEP packages.
See "Socket (PGA-370)."
All Celeron processors at 433MHz and lower have been available in the SEPP that plugs into the 242-contact slot connector. The 300MHz and higher versions are also available in the PPGA package. This means that the 300MHz to 433MHz have been available in both packages, while the 466MHz and higher speed versions are only available in the PPGA.
Motherboards that include Socket 370 can accept the PGA versions of both the Celeron or Pentium III in most cases. If you want to use a Socket 370 version of the Celeron in a Slot 1 motherboard, there are slot-to-socket adapters (usually called slot-kets) available for about $10–$20 that plug into Slot 1 and incorporate a Socket 370 on the card. Figure 3.47 shows a typical slot-ket adapter.
Figure 3.47 Slot-ket adapter for installing PPGA processors in Slot 1 motherboards.
Highlights of the Celeron include
Available at 300MHz (300A) and higher core frequencies with 128KB on-die L2 cache; 300MHz and 266MHz core frequencies without L2 cache
L2 cache supports up to 4GB RAM address range and ECC (Error Correcting Code)
Uses same P6 core processor as the Pentium II (266 through 533MHz) and now the Pentium III (533A MHz and higher)
Dynamic execution microarchitecture
Operates on a 66MHz CPU bus (future versions will likely also use the 100MHz bus)
Specifically designed for lower-cost value PC systems
Includes MMX technology; Celeron 533A and higher includes SSE
More cost-effective packaging technology including Single Edge Processor (SEP), Plastic Pin Grid Array (PPGA), or Flip Chip Pin Grid Array (FCPGA) packages
Integrated 32KB L1 cache, implemented as separate 16KB instruction and 16KB data caches
Integrated thermal diode for temperature monitoring
The Intel Celeron processors from the 300A and higher include integrated 128KB L2 cache. The core for the 300A through 533MHz versions which are based on the Pentium II core include 19 million transistors due to the addition of the integrated 128KB L2 cache. The 533A and faster versions are based on the Pentium III core and incorporate 28.1 million transistors. The Pentium III–based versions actually have 256KB of L2 cache on the die; however, 128KB is disabled, leaving 128KB of functional L2 cache. This was done because it was cheaper for Intel to simply make the Pentium III and Celeron using the same die and just disable part of the cache on the Celeron versions, rather than to come up with a unique die for the newer Celerons. The Pentium III–based Celeron processors also support the Streaming SIMD Extensions (SSE) in addition to MMX instructions. The older Celerons based on the Pentium II core only support MMX.
All the Celerons are manufactured using the .25 micron process, which reduces processor heat and enables the Intel Celeron processor to use a smaller heat sink compared to some of the Pentium II processors. Table 3.34 shows the power consumed by the various Celeron processors.
Table 3.34 Intel Celeron Processor Power Consumption
Speed (MHz)
L2 Cache
Max. Temp. (C)
Voltage Power
Max. (W)
Package
266
none
85
2.0V
16.59
SEPP
266
none
85
2.0V
16.59
SEPP
300
none
85
2.0V
18.48
SEPP
300
none
85
2.0V
18.48
SEPP
300A
128KB
85
2.0V
19.05
SEPP
300A
128KB
85
2.0V
19.05
SEPP
300A
128KB
85
2.0V
19.05
PPGA
333
128KB
85
2.0V
20.94
SEPP
333
128KB
85
2.0V
20.94
SEPP
333
128KB
85
2.0V
20.94
PPGA
366
128KB
85
2.0V
21.7
SEPP
366
128KB
85
2.0V
21.7
PPGA
400
128KB
85
2.0V
23.7
SEPP
400
128KB
85
2.0V
23.7
PPGA
433
128KB
85
2.0V
24.1
PPGA
466
128KB
70
2.0V
25.7
PPGA
500
128KB
70
2.0V
27.2
PPGA
533
128KB
70
2.0V
28.3
PPGA
533A
128KB
90
1.5V
11.2
FCPGA
566
128KB
90
1.5V
14.9
FCPGA
600
128KB
90
1.5V
15.8
FCPGA
Figure 3.48 shows the Intel Celeron processor identification information. Figure 3.49 shows the Celeron's PPGA processor markings.
Figure 3.48 Celeron SEPP (Single Edge Processor Package) processor markings.
NOTE
The markings on the processor identify the following information:
SYYYY = S-spec. number
FFFFFFFF = FPO # (test lot traceability #)
COA = Country of assembly
NOTE
The PPGA processor markings identify the following information:
AAAAAAA = Product code
ZZZ = Processor speed (MHz)
LLL = Integrated L2 cache size (in Kilobytes)
SYYYY = S-spec. number
FFFFFFFF-XXXX = Assembly lot tracking number
Figure 3.49 Celeron PPGA processor markings.
Table 3.35 shows all the available variations of the Celeron, indicated by the S-specification number.
Pentium III
The Pentium III processor, shown in Figure 3.50, was first released in February 1999 and introduced several new features to the P6 family. The most important advancements are the streaming SIMD extensions (SSE), consisting of 70 new instructions that dramatically enhance the performance and possibilities of advanced imaging, 3D, streaming audio, video, and speech-recognition applications.
Figure 3.50 Pentium III processor in SECC2 (Slot 1) and FC-PGA (Socket 370) packages. Photograph used by permission of Intel Corporation.
Originally based on Intel's advanced 0.25 micron CMOS process technology, the PIII core started out with over 9.5 million transistors. In late 1999 Intel shifted to a 0.18 micron process and added 256KB of on-die L2 cache, which brought the transistor count to a whopping 28.1 million! The Pentium III is available in speeds from 450MHz through 1000MHz and beyond, as well as server versions with larger or faster cache called Xeon. The Pentium III also incorporates advanced features such as a 32KB L1 cache and either half-core speed 512KB L2 cache or full-core speed on-die 256KB L2 with cacheability for up to 4GB of addressable memory space. The PIII also can be used in dual-processing systems with up to 64GB of physical memory. A self-reportable processor serial number gives security, authentication, and system management applications a powerful new tool for identifying individual systems.
Table 3.35 Intel Celeron Variations and Specifications
Speed (MHz)
Bus Speed (MHz)
Multiplier
Boxed CPU S-spec
OEM CPU S-spec
Stepping
CPUID
L2 Cache
Graphics Extensions
Max. Temp. (C)
Voltage
Max. Power (W)
Process (microns)
Transistors
Package
Introduced
266
66
4x
SL2YN
SL2SY
dA0
0650
none
MMX
85
2.0V
16.59
0.25
7.5M
SEPP
Apr. 1998
266
66
4x
SL2QG
SL2TR
dA1
0651
none
MMX
85
2.0V
16.59
0.25
7.5M
SEPP
Apr. 1998
300
66
4.5x
SL2Z7
SL2YP
dA0
0650
none
MMX
85
2.0V
18.48
0.25
7.5M
SEPP
Jun. 1998
300
66
4.5x
SL2Y2
SL2X8
dA1
0651
none
MMX
85
2.0V
18.48
0.25
7.5M
SEPP
Jun. 1998
300A
66
4.5x
SL32A
SL2WM
mA0
0660
128KB
MMX
85
2.0V
19.05
0.25
19M
SEPP
Aug. 1998
300A
66
4.5x
SL2WM
SL2WM
mA0
0660
128KB
MMX
85
2.0V
19.05
0.25
19M
SEPP
Aug. 1998
300A
66
4.5x
SL35Q
SL36A
mB0
0665
128KB
MMX
85
2.0V
19.05
0.25
19M
PPGA
Aug. 1998
333
66
5x
SL32B
SL2WN
mA0
0660
128KB
MMX
85
2.0V
20.94
0.25
19M
SEPP
Aug. 1998
333
66
5x
SL2WN
SL2WN
mA0
0660
128KB
MMX
85
2.0V
20.94
0.25
19M
SEPP
Aug. 1998
333
66
5x
SL35R
SL36B
mB0
0665
128KB
MMX
85
2.0V
20.94
0.25
19M
PPGA
Aug. 1998
366
66
5.5x
SL37Q
SL376
mA0
0660
128KB
MMX
85
2.0V
21.70
0.25
19M
SEPP
Jan. 1999
366
66
5.5x
SL35S
SL36C
mB0
0665
128KB
MMX
85
2.0V
21.70
0.25
19M
PPGA
Jan. 1999
400
66
6x
SL37V
SL39Z
mA0
0660
128KB
MMX
85
2.0V
23.70
0.25
19M
SEPP
Jan. 1999
400
66
6x
SL37X
SL3A2
mB0
0665
128KB
MMX
85
2.0V
23.70
0.25
19M
PPGA
Jan. 1999
433
66
6.5x
SL3BS
SL3BA
mB0
0665
128KB
MMX
85
2.0V
24.1
0.25
19M
PPGA
Mar. 1999
466
66
7x
SL3FL
SL3EH
mB0
0665
128KB
MMX
70
2.0V
25.7
0.25
19M
PPGA
Apr. 1999
500
66
7.5x
SL3LQ
SL3FY
mB0
0665
128KB
MMX
70
2.0V
27.2
0.25
19M
PPGA
Aug. 1999
533
66
8x
SL3PZ
SL3FZ
mB0
0665
128KB
MMX
70
2.0V
28.3
0.25
19M
PPGA
Jan. 2000
533A
66
8x
n/a
SL46S
cBO
068x
128KB
SSE
90
1.5V
11.2
0.18
28.1M
FCPGA
Mar. 2000
566
66
8.5x
SL3W7
SL46T
cB0
068x
128KB
SSE
90
1.5V
14.9
0.18
28.1M
FCPGA
Mar. 2000
600
66
9x
SL3W8
SL46U
cB0
068x
128KB
SSE
90
1.5V
15.8
0.18
28.1M
FCPGA
Mar. 2000
SEPP = Single Edge Processor Package (Card) SSE = MMX plus Streaming SIMD (Single Instruction Multiple Data) Extensions
PPGA = Plastic Pin Grid Array Boxed processors include a heat sink with fan
FCPGA = Flip Chip Pin Grid Array 266MHz through 533MHz are based on 0.25 micron Pentium II core
MMX = Multi Media Extensions 533A MHz and higher are based on 0.18 micron Pentium III core
Pentium III processors are available in Intel's Single Edge Contact Cartridge 2 (SECC2) form factor, which is replacing the more expensive older SEC packaging. The SECC2 package covers only one side of the chip, and allows for better heat sink attachment and less overall weight. It is also less expensive.
Architectural features of the Pentium III processor include
Streaming SIMD Extensions. Seventy new instructions for dramatically faster processing and improved imaging, 3D streaming audio and video, Web access, speech recognition, new user interfaces, and other graphics and sound-rich applications.
Intel Processor Serial Number. The processor serial number, the first of Intel's planned building blocks for PC security, serves as an electronic serial number for the processor and, by extension, its system or user. This enables the system/user to be identified by networks and applications. The processor serial number will be used in applications that benefit from stronger forms of system and user identification, such as the following:
Applications using security capabilities. Managed access to new Internet content and services; electronic document exchange.
Manageability applications. Asset management; remote system load and configuration.
Intel MMX Technology.
Dynamic Execution Technology.
Incorporates an on-die diode. This can be used to monitor the die temperature for thermal management purposes.
Most of the Pentium III processors will be made in the improved SECC2 packaging or, even better, the FC-PGA (Flip Chip PGA) package, which is much less expensive to produce and allows for a more direct attachment of the heat sink to the processor core for better cooling. The FC-PGA version plugs into Socket 370 but can be used in Slot 1 with a slot-ket adapter.
All Pentium III processors have either 512KB or 256KB of L2 cache, which runs at either half-core or full-core speed. Xeon versions have either 512KB, 1MB, or 2MB of L2 cache that runs at full-core speed. These are more expensive versions designed for servers and workstations.
All PIII processor L2 caches can cache up to 4GB of addressable memory space, and include Error Correction Code (ECC) capability.
Pentium III processors can be identified by their markings, which are found on the top edge of the processor cartridge. Figure 3.51 shows the format and meaning of the markings.
Figure 3.51 Pentium III processor markings.
Table 3.36 shows the available variations of the Pentium III, indicated by the S-specification number.
Pentium III processors are all clock multiplier locked. This is a means to prevent processor fraud and overclocking by making the processor work only at a given clock multiplier. Unfortunately, this feature can be bypassed by making modifications to the processor under the cartridge cover, and unscrupulous individuals have been selling lower-speed processors remarked as higher speeds. It pays to purchase your systems or processors from direct Intel distributors or high-end dealers that do not engage in these practices.
Pentium II/III Xeon
The Pentium II and III processors are available in special high-end versions called Xeon processors. Originally introduced in June 1998 in Pentium II versions, later Pentium III versions were introduced in March 1999. These differ from the standard Pentium II and III in three ways: packaging, cache size, and cache speed.
Xeon processors use a larger SEC (Single Edge Contact) cartridge than the standard PII/III processors, mainly to house a larger internal board with more cache memory. The Xeon processor is shown in Figure 3.52; the Xeon's SEC is shown in Figure 3.53.
Figure 3.52 Pentium III Xeon processor. Photograph used by permission of Intel Corporation.
Figure 3.53 Xeon processor internal components.
Table 3.36 Intel Pentium III Processor Variations
Speed (MHz)
Bus Speed (MHz)
Multiplier
Boxed CPU S-spec
OEM CPU S-spec
Stepping
CPUID
L2 Cache
L2 Speed
Temp. Max. (C)
Voltage
Max. Power (W)
Process (microns)
Transistors
Package
Introduced
450
100
4.5x
SL3CC
SL364
kB0
0672
512KB
225
90
2.00
25.3
0.25
9.5M
SECC2
Feb. 1999
450
100
4.5x
SL37C
SL35D
kC0
0673
512KB
225
90
2.00
25.3
0.25
9.5M
SECC2
Feb. 1999
500
100
5x
SL3CD
SL365
kB0
0672
512KB
250
90
2.00
28.0
0.25
9.5M
SECC2
Feb. 1999
500
100
5x
SL365
SL365
kB0
0672
512KB
250
90
2.00
28.0
0.25
9.5M
SECC2
Feb. 1999
500
100
5x
SL37D
SL35E
kC0
0673
512KB
250
90
2.00
28.0
0.25
9.5M
SECC2
Feb. 1999
500E
100
5x
SL3R2
SL3Q9
cA2
0681
256KB
500
85
1.60
13.2
0.18
28.1M
FCPGA
Oct. 1999
500E
100
5x
SL45R
SL444
cB0
0683
256KB
500
85
1.60
13.2
0.18
28.1M
FCPGA
Oct. 1999
533B
133
4x
SL3E9
SL3BN
kC0
0673
512KB
267
90
2.05
29.7
0.25
9.5M
SECC2
Sept. 1999
533EB
133
4x
SL3SX
SL3N6
cA2
0681
256KB
533
85
1.65
14.0
0.18
28.1M
SECC2
Oct. 1999
533EB
133
4x
SL3VA
SL3VF
cA2
0681
256KB
533
85
1.65
14.0
0.18
28.1M
FCPGA
Oct. 1999
533EB
133
4x
SL44W
SL3XG
cB0
0683
256KB
533
85
1.65
14.0
0.18
28.1M
SECC2
Oct. 1999
533EB
133
4x
SL45S
SL3XS
cB0
0683
256KB
533
85
1.65
14.0
0.18
28.1M
FCPGA
Oct. 1999
550
100
5.5x
SL3FJ
SL3F7
kC0
0673
512KB
275
80
2.00
30.8
0.25
9.5M
SECC2
May 1999
550E
100
5.5x
SL3R3
SL3QA
cA2
0681
256KB
550
85
1.60
14.5
0.18
28.1M
FCPGA
Oct. 1999
550E
100
5.5x
SL3V5
SL3N7
cA2
0681
256KB
550
85
1.60
14.5
0.18
28.1M
SECC2
Oct. 1999
550E
100
5.5x
SL44X
SL3XH
cB0
0683
256KB
550
85
1.60
14.5
0.18
28.1M
SECC2
Oct. 1999
550E
100
5.5x
SL45T
N/A
cB0
0683
256KB
550
85
1.60
14.5
0.18
28.1M
FCPGA
Oct. 1999
600
100
6x
SL3JT
SL3JM
kC0
0673
512KB
300
85
2.00
34.5
0.25
9.5M
SECC2
Aug. 1999
600E
100
6x
SL3NA
SL3H6
cA2
0681
256KB
600
82
1.65
15.8
0.18
28.1M
SECC2
Oct. 1999
600E
100
6x
SL3NL
SL3VH
cA2
0681
256KB
600
82
1.65
15.8
0.18
28.1M
FCPGA
Feb. 2000
600E
100
6x
SL44Y
SL43E
cB0
0683
256KB
600
82
1.65
15.8
0.18
28.1M
SECC2
Oct. 1999
600E
100
6x
SL45U
SL3XU
cB0
0683
256KB
600
82
1.65
15.8
0.18
28.1M
FCPGA
Feb. 2000
600B
133
4.5x
SL3JU
SL3JP
kC0
0673
512KB
300
85
2.05
34.5
0.25
9.5M
SECC2
Sept. 1999
600EB
133
4.5x
SL3NB
SL3H7
cA2
0681
256KB
600
82
1.65
15.8
0.18
28.1M
SECC2
Oct. 1999
600EB
133
4.5x
SL3VB
SL3VG
cA2
0681
256KB
600
82
1.65
15.8
0.18
28.1M
FCPGA
Feb. 2000
600EB
133
4.5x
SL44Z
SL3XJ
cB0
0683
256KB
600
82
1.65
15.8
0.18
28.1M
SECC2
Oct. 1999
600EB
133
4.5x
SL45V
SL3XT
cB0
0683
256KB
600
82
1.65
15.8
0.18
28.1M
FCPGA
Feb. 2000
650
100
6.5x
SL3NR
SL3KV
cA2
0681
256KB
650
82
1.65
17.0
0.18
28.1M
SECC2
Oct. 1999
650
100
6.5x
SL3NM
SL3VJ
cA20
681
256KB
650
82
1.65
17.0
0.18
28.1M
FCPGA
Oct. 1999
650
100
6.5x
SL452
SL3XK
cB0
0683
256KB
650
82
1.65
17.0
0.18
28.1M
SECC2
Oct. 1999
650
100
6.5x
SL45W
SL3XV
cB0
0683
256KB
650
82
1.65
17.0
0.18
28.1M
FCPGA
Oct. 1999
667
133
5x
SL3ND
SL3KW
cA2
0681
256KB
667
82
1.65
17.5
0.18
28.1M
SECC2
Oct. 1999
667
133
5x
SL3T2
SL3VK
cA2
0681
256KB
667
82
1.65
17.5
0.18
28.1M
FCPGA
Oct. 1999
667
133
5x
SL453
SL3XL
cB0
0683
256KB
667
82
1.65
17.5
0.18
28.1M
SECC2
Oct. 1999
667
133
5x
SL45X
SL3XW
cB0
0683
256KB
667
82
1.65
17.5
0.18
28.1M
FCPGA
Oct. 1999
700
100
7x
SL3SY
SL3S9
cA2
0681
256KB
700
80
1.65
18.3
0.18
28.1M
SECC2
May 2000
700
100
7x
SL3T3
SL3VL
cA2
0681
256KB
700
80
1.65
18.3
0.18
28.1M
FCPGA
May 2000
700
100
7x
SL454
SL453
cB0
0683
256KB
700
80
1.65
18.3
0.18
28.1M
SECC2
May 2000
700
100
7x
SL45Y
SL3XX
cB0
0683
256KB
700
80
1.65
18.3
0.18
28.1M
FCPGA
May 2000
733
133
5.5x
SL3SZ
SL3SB
cA2
0681
256KB
733
80
1.65
19.1
0.18
28.1M
SECC2
May 2000
733
133
5.5x
SL3T4
SL3VM
cA2
0681
256KB
733
80
1.65
19.1
0.18
28.1M
FCPGA
May 2000
733
133
5.5x
SL455
SL3XN
cB0
0683
256KB
733
80
1.65
19.1
0.18
28.1M
SECC2
May 2000
733
133
5.5x
SL45Z
SL3XY
cB0
0683
256KB
733
80
1.65
19.1
0.18
28.1M
FCPGA
May 2000
750
100
7.5x
SL3V6
SL3WC
cA2
0681
256KB
750
80
1.65
19.5
0.18
28.1M
SECC2
Dec. 1999
750
100
7.5x
SL3VC
SL3VN
cA2
0681
256KB
750
80
1.65
19.5
0.18
28.1M
FCPGA
Dec. 1999
750
100
7.5x
SL456
SL3XP
cB0
0683
256KB
750
80
1.65
19.5
0.18
28.1M
SECC2
Dec. 1999
750
100
7.5x
SL462
SL3XZ
cB0
0683
256KB
750
80
1.65
19.5
0.18
28.1M
FCPGA
Dec. 1999
800
100
8x
SL457
SL3XR
cB0
0683
256KB
800
80
1.65
20.8
0.18
28.1M
SECC2
Dec. 1999
800
100
8x
SL463
SL3Y3
cB0
0683
256KB
800
80
1.65
20.8
0.18
28.1M
FCPGA
Dec. 1999
800EB
133
6x
SL458
SL3XQ
cB0
0683
256KB
800
80
1.65
20.8
0.18
28.1M
SECC2
Dec. 1999
800EB
133
6x
SL464
SL3Y2
cB0
0683
256KB
800
80
1.65
20.8
0.18
28.1M
FCPGA
Dec. 1999
850
100
8.5x
SL47M
SL43F
cB0
0683
256KB
850
80
1.65
22.5
0.18
28.1M
SECC2
Mar. 2000
850
100
8.5x
SL49G
SL43H
cB0
0683
256KB
850
80
1.65
22.5
0.18
28.1M
FCPGA
Mar. 2000
866
133
6.5x
SL47N
SL43G
cB0
0683
256KB
866
80
1.65
22.9
0.18
28.1M
SECC2
Mar. 2000
866
133
6.5x
SL49H
SL43J
cB0
0683
256KB
866
80
1.65
22.5
0.18
28.1M
FCPGA
Mar. 2000
933
133
7x
SL47Q
SL448
cB0
0683
256KB
933
75
1.65
25.5
0.18
28.1M
SECC2
May 2000
933
133
7x
SL49J
SL44J
cB0
0683
256KB
933
75
1.65
24.5
0.18
28.1M
FCPGA
May 2000
1000
133
7.5x
n/a
SL48S
cB0
0683
256KB
1000
60
1.70
33.0
0.18
28.1M
SECC2
Mar. 2000
SECC = Single Edge Contact Cartridge ECC = Error Correcting Code
SECC2 = Single Edge Contact Cartridge revision 2 1. This is a boxed processor with an attached heat sink
CPUID = The internal ID returned by the CPUID instruction
Besides the larger package, the Xeon processors also include more L2 cache. They are available in three variations, with 512KB, 1MB, or 2MB of L2 cache. This cache is costly; the list price of the 2MB version is about $2,000!
Even more significant than the size of the cache is its speed. All the cache in the Xeon processors run at the full-core speed. This is difficult to do considering that the cache chips are separate chips on the board; up until recently they were not integrated into the processor die. The original Pentium II Xeon processors had 7.5 million transistors in the main processor die, whereas the later Pentium III Xeon came with 9.5 million. When the Pentium III versions with on-die cache were released, the transistor count went up to 28.1 million transistors in the 256KB cache version, 84 million transistors in the 1MB cache version, and a whopping 140 million transistors in the latest 2MB cache version, setting an industry record. The high transistor counts are due to the on-die L2 cache, which is very transistor intensive. The L2 cache in all Xeon processors has a full 64GB RAM address range and supports ECC (Error Correcting Code).
Table 3.37 shows the Xeon processor specifications for each model.
Table 3.37 Intel Pentium II and III Xeon Specifications
Pentium II Xeon:
Speed (MHz)
Bus Speed (MHz)
S-spec
Stepping
CPUID
L2 Cache
Transistors
Process (microns)
400
100
SL2RH
B0
0652
512KB
7.5M
0.25
400
100
SL2NB
B0
0652
1024KB
7.5M
0.25
400
100
SL35N
B1
0653
512KB
7.5M
0.25
400
100
SL34H
B1
0653
512KB
7.5M
0.25
400
100
SL35P
B1
0653
1024KB
7.5M
0.25
400
100
SL34J
B1
0653
1024KB
7.5M
0.25
450
100
SL33T
B1
0653
512KB
7.5M
0.25
450
100
SL354
B1
0653
512KB
7.5M
0.25
450
100
SL36W
B1
0653
512KB
7.5M
0.25
450
100
SL2XJ
B1
0653
512KB
7.5M
0.25
450
100
SL33U
B1
0653
1024KB
7.5M
0.25
450
100
SL2XK
B1
0653
1024KB
7.5M
0.25
450
100
SL33V
B1
0653
2048KB
7.5M
0.25
450
100
SL2XL
B1
0653
2048KB
7.5M
0.25
Pentium III Xeon:
500
100
SL2XU
B0
0672h
512KB
9.5M
0.25
500
100
SL2XV
B0
0672h
1024KB
9.5M
0.25
500
100
SL2XW
B0
0672h
2048KB
9.5M
0.25
500
100
SL3C9
B0
0672h
512KB
9.5M
0.25
500
100
SL3CA
B0
0672h
1024KB
9.5M
0.25
500
100
SL3CB
B0
0672h
2048KB
9.5M
0.25
550
100
SL3FK
C0
0673h
512KB
9.5M
0.25
500
100
SL3D9
C0
0673h
512KB
9.5M
0.25
500
100
SL3DA
C0
0673h
1024KB
9.5M
0.25
500
100
SL3DB
C0
0673h
2048KB
9.5M
0.25
550
100
SL3AJ
C0
0673h
512KB
9.5M
0.25
550
100
SL3CE
C0
0673h
1024KB
9.5M
0.25
550
100
SL3CF
C0
0673h
2048KB
9.5M
0.25
550
100
SL3TW
C0
0673h
1024KB
9.5M
0.25
550
100
SL3Y4
C0
0673h
512KB
9.5M
0.25
550
100
SL3FR
C0
0673h
512KB
9.5M
0.25
500
100
SL385
C0
0673h
512KB
9.5M
0.25
500
100
SL386
C0
0673h
1024KB
9.5M
0.25
500
100
SL387
C0
0673h
2048KB
9.5M
0.25
550
100
SL3LM
C0
0673h
512KB
9.5M
0.25
550
100
SL3LN
C0
0673h
1024KB
9.5M
0.25
550
100
SL3LP
C0
0673h
2048KB
9.5M
0.25
600
133
SL3BJ
A2
0681h
256KB
28.1M
0.18
600
133
SL3BK
A2
0681h
256KB
28.1M
0.18
667
133
SL3BL
A2
0681h
256KB
28.1M
0.18
667
133
SL3DC
A2
0681h
256KB
28.1M
0.18
733
133
SL3SF
A2
0681h
256KB
28.1M
0.18
733
133
SL3SG
A2
0681h
256KB
28.1M
0.18
800
133
SL3V2
A2
0681h
256KB
28.1M
0.18
800
133
SL3V3
A2
0681h
256KB
28.1M
0.18
600
133
SL3SS
A2
0681h
256KB
28.1M
0.18
667
133
SL3ST
A2
0681h
256KB
28.1M
0.18
733
133
SL3SU
A2
0681h
256KB
28.1M
0.18
800
133
SL3VU
A2
0681h
256KB
28.1M
0.18
600
133
SL3WM
B0
0683h
256KB
28.1M
0.18
600
133
SL3WN
B0
0683h
256KB
28.1M
0.18
667
133
SL3WP
B0
0683h
256KB
28.1M
0.18
667
133
SL3WQ
B0
0683h
256KB
28.1M
0.18
733
133
SL3WR
B0
0683h
256KB
28.1M
0.18
733
133
SL3WS
B0
0683h
256KB
28.1M
0.18
800
133
SL3WT
B0
0683h
256KB
28.1M
0.18
800
133
SL3WU
B0
0683h
256KB
28.1M
0.18
866
133
SL3WV
B0
0683h
256KB
28.1M
0.18
866
133
SL3WW
B0
0683h
256KB
28.1M
0.18
933
133
SL3WX
B0
683h
256KB
28.1M
0.18
933
133
SL3WY
B0
683h
256KB
28.1M
0.18
700
100
SL3U4
A0
6A0h
1024KB
84M
0.18
700
100
SL3U5
A0
6A0h
1024KB
84M
0.18
700
100
SL3WZ
A0
6A0h
2048KB
140M
0.18
700
100
SL3X2
A0
6A0h
2048KB
140M
0.18
700
100
SL4GD
A0
6A0h
1024KB
84M
0.18
700
100
SL4GE
A0
6A0h
1024KB
84M
0.18
700
100
SL4GF
A0
6A0h
2048KB
140M
0.18
700
100
SL4GG
A0
6A0h
2048KB
140M
0.18
Note that the Slot 2 Xeon processors do not replace the Slot 1 processors. Xeon processors for Slot 2 are targeted at the mid-range to high-end server and workstation market segments, offering larger, full-speed L2 caches and four-way multiprocessor support. Pentium III processors for Slot 1 will continue to be the processor used in the business and home desktop market segments, and for entry-level servers and workstations (single and dual processor systems).
Pentium III Future
There are several new developments on target for the Pentium III processors. The primary trend seems to be the integration of L2 cache into the processor die, which also means it runs at full-core speed.
There will also be further reductions in the process size used to manufacture the processors. Pentium III processors first used the 0.25 micron Katmai core and later shifted to the 0.18 micron Coppermine core with on-die L2 cache. The future will see the migration to the Willamette core, which is an enhanced Pentium III, along with a migration to a 0.13-micron die with likely a larger integrated L2 cache. The shift to the 0.13 micron process will also include a shift from aluminum interconnects on the chip die to copper interconnects, as well as the use of larger 300mm (12") wafers.
Other Sixth-Generation Processors
Besides Intel, many other manufacturers are now making P6-type processors, but often with a difference. Most of them are designed to interface with P5 class motherboards and for the lower-end markets. AMD has recently offered up the Athlon and Duron processors, which are true sixth-generation designs using their own proprietary connection to the system.
This section examines the various sixth-generation processors from manufacturers other than Intel.
NexGen Nx586
NexGen was founded by Thampy Thomas who hired some of the people formerly involved with the 486 and Pentium processors at Intel. At NexGen, developers created the Nx586, a processor that was functionally the same as the Pentium but not pin compatible. As such, it was always supplied with a motherboard; in fact, it was normally soldered in. NexGen did not manufacture the chips or the motherboards they came in; for that it hired IBM Microelectronics. Later NexGen was bought by AMD, right before it was ready to introduce the Nx686, a greatly improved design done by Greg Favor, and a true competitor for the Pentium. AMD took the Nx686 design and combined it with a Pentium electrical interface to create a drop-in Pentium compatible chip called the K6, which actually outperformed the original from Intel.
The Nx586 had all the standard fifth-generation processor features, such as superscalar execution with two internal pipelines and a high performance integral L1 cache with separate code and data caches. One advantage is that the Nx586 includes separate 16KB instruction and 16KB data caches compared to 8KB each for the Pentium. These caches keep key instruction and data close to the processing engines to increase overall system performance.
The Nx586 also included branch prediction capabilities, which are one of the hallmarks of a sixth-generation processor. Branch prediction means the processor has internal functions to predict program flow to optimize the instruction execution.
The Nx586 processor also featured an RISC (Reduced Instruction Set Computer) core. A translation unit dynamically translates x86 instructions into RISC86 instructions. These RISC86 instructions were specifically designed with direct support for the x86 architecture while obeying RISC performance principles. They are thus simpler and easier to execute than the complex x86 instructions. This type of capability is another feature normally found only in P6 class processors.
The Nx586 was discontinued after the merger with AMD, which then took the design for the successor Nx686 and released it as the AMD-K6.
AMD-K6 Series
The AMD-K6 processor is a high-performance sixth-generation processor that is physically installable in a P5 (Pentium) motherboard. It was essentially designed for AMD by NexGen, and was first known as the Nx686. The NexGen version never appeared because it was purchased by AMD before the chip was due to be released. The AMD-K6 delivers performance levels somewhere between the Pentium and Pentium II processor due to its unique hybrid design. Because it is designed to install in Socket 7, which is a fifth-generation processor socket and motherboard design, it cannot perform quite as a true sixth-generation chip because the Socket 7 architecture severely limits cache and memory performance. However, with this processor, AMD is giving Intel a lot of competition in the low- to mid-range market, where the Pentium is still popular.
The K6 processor contains an industry-standard, high-performance implementation of the new multimedia instruction set (MMX), enabling a high level of multimedia performance. The K6-2 introduced an upgrade to MMX AMD calls 3DNow, which adds even more graphics and sound instructions. AMD designed the K6 processor to fit the low-cost, high-volume Socket 7 infrastructure. This enables PC manufacturers and resellers to speed time to market and deliver systems with an easy upgrade path for the future. AMD's state-of-the-art manufacturing facility in Austin, Texas (Fab 25) makes the AMD-K6 series processors. Initially it used AMD's 0.35 micron, five-metal layer process technology; newer variations use the 0.25 micron processor to increase production quantities because of reduced die size, as well as to decrease power consumption.
AMD-K6 processor technical features include
Sixth-generation internal design, fifth-generation external interface
Internal RISC core, translates x86 to RISC instructions
Superscalar parallel execution units (seven)
Dynamic execution
Branch prediction
Speculative execution
Large 64KB L1 cache (32KB instruction cache plus 32KB write-back dual-ported data cache)
Built-in floating-point unit (FPU)
Industry-standard MMX instruction support
System Management Mode (SMM)
Ceramic Pin Grid Array (CPGA) Socket 7 design
Manufactured using a 0.35 micron and 0.25 micron, five-layer design
The K6-2 adds
Higher clock speeds
Higher bus speeds of up to 100MHz (Super7 motherboards)
3DNow; 21 new graphics and sound processing instructions
The K6-3 adds
256KB of on-die full-core speed L2 cache
The addition of the full speed L2 cache in the K6-3 is significant. It brings the K6 series to a level where it can fully compete with the Intel Celeron and Pentium II processors. The 3DNow capability added in the K6-2/3 is also being exploited by newer graphics programs, making these processors ideal for lower-cost gaming systems.
The AMD-K6 processor architecture is fully x86 binary code compatible, which means it runs all Intel software, including MMX instructions. To make up for the lower L2 cache performance of the Socket 7 design, AMD has beefed up the internal L1 cache to 64KB total, twice the size of the Pentium II or III. This, plus the dynamic execution capability, allows the K6 to outperform the Pentium and come close to the Pentium II in performance for a given clock rate. The K6-3 is even better with the addition of full-core speed L2 cache.
Both the AMD-K5 and AMD-K6 processors are Socket 7 bus-compatible. However, certain modifications might be necessary for proper voltage setting and BIOS revisions. To ensure reliable operation of the AMD-K6 processor, the motherboard must meet specific voltage requirements.
The AMD processors have specific voltage requirements. Most older split-voltage motherboards default to 2.8v Core/3.3v I/O, which is below specification for the AMD-K6 and could cause erratic operation. To work properly, the motherboard must have Socket 7 with a dual-plane voltage regulator supplying 2.9v or 3.2v (233MHz) to the CPU core voltage (Vcc2) and 3.3v for the I/O (Vcc3). The voltage regulator must be capable of supplying up to 7.5A (9.5A for the 233MHz) to the processor. When used with a 200MHz or slower processor, the voltage regulator must maintain the core voltage within 145 mV of nominal (2.9v+/-145 mV). When used with a 233MHz processor, the voltage regulator must maintain the core voltage within 100 mV of nominal (3.2v+/-100 mV).
If the motherboard has a poorly designed voltage regulator that cannot maintain this performance, unreliable operation can result. If the CPU voltage exceeds the absolute maximum voltage range, the processor can be permanently damaged. Also note that the K6 can run hot. Ensure your heat sink is securely fitted to the processor and the thermally conductive grease or pad is properly applied.
The motherboard must have an AMD-K6 processor-ready BIOS with support for the K6 built in. Award has that support in its March 1, 1997 or later BIOS, AMI had K6 support in any of its BIOS with CPU Module 3.31 or later, and Phoenix supports the K6 in version 4.0, release 6.0, or release 5.1 with build dates of 4/7/97 or later.
Because these specifications can be fairly complicated, AMD keeps a list of motherboards that have been verified to work with the AMD-K6 processor on its Web site. All the motherboards on that list have been tested to work properly with the AMD-K6. So, unless these requirements can be verified elsewhere, it is recommended that you only use a motherboard from that list with the AMD-K6 processor.
The multiplier, bus speed, and voltage settings for the K6 are shown in Table 3.38. You can identify which AMD-K6 you have by looking at the markings on this chip, as shown in Figure 3.54.
Table 3.38 AMD-K6 Processor Speeds and Voltages
Processor
Core Speed
Clock Multiplier
Bus Speed
Core Voltage
I/O Voltage
K6-3
450MHz
4.5x
100MHz
2.4v
3.3v
K6-3
400MHz
4x
100MHz
2.4v
3.3v
K6-2
475MHz
5x
95MHz
2.4v
3.3v
K6-2
450MHz
4.5x
100MHz
2.4v
3.3v
K6-2
400MHz
4x
100MHz
2.2v
3.3v
K6-2
380MHz
4x
95MHz
2.2v
3.3v
K6-2
366MHz
5.5x
66MHz
2.2v
3.3v
K6-2
350MHz
3.5x
100MHz
2.2v
3.3v
K6-2
333MHz
3.5x
95MHz
2.2v
3.3v
K6-2
333MHz
5.0x
66MHz
2.2v
3.3v
K6-2
300MHz
3x
100MHz
2.2v
3.3v
K6-2
300MHz
4.5x
66MHz
2.2v
3.3v
K6-2
266MHz
4x
66MHz
2.2v
3.3v
K6
300MHz
4.5x
66MHz
2.2v
3.45v
K6
266MHz
4x
66MHz
2.2v
3.3v
K6
233MHz
3.5x
66MHz
3.2v
3.3v
K6
200MHz
3x
66MHz
2.9v
3.3v
K6
166MHz
2.5x
66MHz
2.9v
3.3v
Figure 3.54 AMD-K6 processor markings.
Older motherboards achieve the 3.5x setting by setting jumpers for 1.5x. The 1.5x setting for older motherboards equates to a 3.5x setting for the AMD-K6 and newer Intel parts. To get the 4x and higher setting requires a motherboard that controls three BF (bus frequency) pins, including BF2. Older motherboards can only control two BF pins. The settings for the multipliers are shown in Table 3.39.
Table 3.39 AMD-K6 Multiplier Settings
Multiplier Setting
BF0
BF1
BF2
2.5x
Low
Low
High
3x
High
Low
High
3.5x
High
High
High
4x
Low
High
Low
4.5x
Low
Low
Low
5x
High
Low
Low
5.5x
High
High
Low
These settings are normally controlled by jumpers on the motherboard. Consult your motherboard documentation to see where they are and how to set them for the proper multiplier and bus speed settings.
Unlike Cyrix and some of the other Intel competitors, AMD is a manufacturer and a designer. This means it designs and builds its chips in its own fabs. Like Intel, AMD is migrating to 0.25 micron process technology and beyond. The original K6 has 8.8 million transistors and is built on a 0.35 micron, five-layer process. The die is 12.7mm on each side, or about 162 square mm. The K6-3 uses a 0.25 micron process and now incorporates 21.3 million transistors on a die only 10.9mm on each side, or about 118 square mm. Further process improvements will enable even more transistors, smaller die, higher yields, and greater numbers of processors. AMD has recently won contracts with several high-end system suppliers, which gives it an edge on the other Intel competitors. AMD has delivered more than 50 million Windows-compatible CPUs in the last five years.
Because of its performance and compatibility with the Socket 7 interface, the K6 series is often looked at as an excellent processor upgrade for motherboards currently using older Pentium or Pentium MMX processors. Although they do work in Socket 7, the AMD-K6 processors have different voltage and bus speed requirements than the Intel processors. Before attempting any upgrades, you should check the board documentation or contact the manufacturer to see if your board will meet the necessary requirements. In some cases, a BIOS upgrade will also be necessary.
AMD Athlon
The Athlon is AMD's successor to the K6 series (see Figure 3.55). The Athlon is a whole new chip from the ground up and does not interface via the Socket 7 or Super7 sockets like its previous chips. In the initial Athlon versions, AMD used a cartridge design almost exactly like that of the Intel Pentium II and III. This was due to the fact that the original Athlons used 512KB of external L2 cache which was mounted on the processor cartridge board. The external cache ran at either one-half core, two-fifths core, or one-third core depending on which speed processor you had. In June of 2000 AMD introduced a revised version of the Athlon (codenamed Thunderbird) that incorporates 256KB of L2 cache directly on the processor die. This on-die cache runs at full-core speed and eliminates a bottleneck in the original Athlon systems. Along with the change to on-die L2 cache, the Athlon was also introduced in a PGA (Pin Grid Array) or chip Socket A version, which is replacing the Slot A cartridge version.
Although the Slot A cartridge looks a lot like the Intel Slot 1, and the Socket A looks like Intel's Socket 370, the pinouts are completely different and the AMD chips do not work in the same motherboards as the Intel chips. This was by design, as AMD was looking for ways to improve its chip architecture and distance itself from Intel. Special blocked pins in either socket or slot design prevent accidentally installing the chip in the wrong orientation or in the wrong slot. Figure 3.55 shows the Athlon in the Slot A cartridge. Figure 3.56 shows the Athlon in the PGA package (Socket A).
Figure 3.55 AMD Athlon processor for Slot A (cartridge form factor).
Figure 3.56 AMD Athlon processor for Socket A (PGA form factor).
The Athlon is available in speeds from 550MHz up to 1GHz and beyond and uses a 200MHz front-side bus called the EV6 to connect to the motherboard North Bridge chip as well as other processors. Licensed from Digital Equipment, the EV6 bus is the same as that used for the Alpha 21264 processor, now owned by Compaq. The EV6 bus uses a clock speed of 100MHz but double-clocks the data, transferring data twice per cycle, for a cycling speed of 200MHz. Since the bus is eight bytes (64 bits) wide, this results in a throughput of eight bytes times 200MHz or 1.6GB/sec. This is superior to the Intel processors that use a front-side bus speed of only up to 133MHz, which results in 8 bytes times 133MHz or 1.07GB/sec. bandwidth. The AMD bus design eliminates a potential bottleneck between the chipset and processor and allows for more efficient transfers compared to other processors. The use of the EV6 bus is one of the primary reasons the Athlon and Duron chips perform so well.
The Athlon has a very large 128KB of L1 cache on the processor die, and one-half, two-fifths, or one-third core speed 512KB L2 cache in the cartridge in the older versions, or 256KB of full-core speed cache in the later ones. All PGA socket A versions have the full speed cache. The Athlon also has support for MMX and the Enhanced 3DNow instructions, which are 45 new instructions designed to support graphics and sound processing. 3DNow is very similar to Intel's SSE (Streaming SIMD Extensions) in design and intent, but the specific instructions are different and require software support. Fortunately most companies producing graphics software have decided to support the 3DNow instructions along with the Intel SSE instructions, with only a few exceptions.
The initial production of the Athlon used 0.25 micron technology, with newer and faster versions being made on a 0.18 micron process. The latest versions are even built using copper metal technology, a first in the PC processor business. Eventually all other processors will follow, as copper inconnects allow for lower power consumption and faster operation.
Table 3.40 shows detailed information on the Slot-A version of the Athlon processor.
Table 3.40 AMD Athlon Slot-A Cartridge Processor Information
Part Number
Model
Speed (MHz)
Bus Speed (MHz)
Multiplier
L2 Cache
(MHz)
L2 Speed Voltage
Current (A)
Max. Power (W)
Max. (microns)
Process Transistors
Introduced
AMD-K7500MTR51B
Model 1
500
100x2
5x
512KB
250
1.60V
25A
42W
0.25
22M
Jun. 1999
AMD-K7550MTR51B
Model 1
550
100x2
5.5x
512KB
275
1.60V
30A
46W
0.25
22M
Jun. 1999
AMD-K7600MTR51B
Model 1
600
100x2
6x
512KB
300
1.60V
33A
50W
0.25
22M
Jun. 1999
AMD-K7650MTR51B
Model 1
650
100x2
6.5x
512KB
325
1.60V
36A
54W
0.25
22M
Aug. 1999
AMD-K7700MTR51B
Model 1
700
100x2
7x
512KB
350
1.60V
33A
50W
0.25
22M
Oct. 1999
AMD-K7550MTR51B
Model 2
550
100x2
5.5x
512KB
275
1.60V
20A
31W
0.18
22M
Nov. 1999
AMD-K7600MTR51B
Model 2
600
100x2
6x
512KB
300
1.60V
21A
34W
0.18
22M
Nov. 1999
AMD-K7650MTR51B
Model 2
650
100x2
6.5x
512KB
325
1.60V
22A
36W
0.18
22M
Nov. 1999
AMD-K7700MTR51B
Model 2
700
100x2
7x
512KB
350
1.60V
24A
39W
0.18
22M
Nov. 1999
AMD-K7750MTR52B
Model 2
750
100x2
7.5x
512KB
300
1.60V
25A
40W
0.18
22M
Nov. 1999
AMD-K7800MPR52B
Model 2
800
100x2
8x
512KB
320
1.70V
29A
48W
0.18
22M
Jan. 2000
AMD-K7850MPR52B
Model 2
850
100x2
8.5x
512KB
340
1.70V
30A
50W
0.18
22M
Feb. 2000
AMD-K7900MNR53B
Model 2
900
100x2
9x
512KB
300
1.80V
34A
60W
0.18
22M
Mar. 2000
AMD-K7950MNR53B
Model 2
950
100x2
9.5x
512KB
317
1.80V
35A
62W
0.18
22M
Mar. 2000
AMD-K7100MNR53B
Model 2
1000
100x2
10x
512KB
333
1.80V
37A
65W
0.18
22M
Mar. 2000
AMD-A0650MPR24B
Model 4
650
100x2
6.5x
256KB
650
1.70V
23.8A
36.1W
0.18
37M
Jun. 2000
AMD-A0700MPR24B
Model 4
700
100x2
7x
256KB
700
1.70V
25.2A
38.3W
0.18
37M
Jun. 2000
AMD-A0750MPR24B
Model 4
750
100x2
7.5x
256KB
750
1.70V
26.6A
40.4W
0.18
37M
Jun. 2000
AMD-A0800MPR24B
Model 4
800
100x2
8x
256KB
800
1.70V
28.0A
42.6W
0.18
37M
Jun. 2000
AMD-A0850MPR24B
Model 4
850
100x2
8.5x
256KB
850
1.70V
29.4A
44.8W
0.18
37M
Jun. 2000
AMD-A0900MMR24B
Model 4
900
100x2
9x
256KB
900
1.75V
31.7A
49.7W
0.18
37M
Jun. 2000
AMD-A0950MMR24B
Model 4
950
100x2
9.5x
256KB
950
1.75V
33.2A
52.0W
0.18
37M
Jun. 2000
AMD-A1000MMR24B
Model 4
1000
100x2
10x
256KB
1000
1.75V
34.6A
54.3W
0.18
37M
Jun. 2000
Table 3.41 shows information on the PGA (Pin Grid Array) or Socket A version of the AMD Athlon processor.
Table 3.41 AMD Athlon PGA (Pin Grid Array) Processor Information
Part Number
Speed (MHz)
Bus Speed (MHz)
Multiplier
L2 Cache
L2 Speed (MHz)
Voltage
Max. Current (A)
Max. Power (W)
Process (microns)
Transistors
Introduced
A0650APT3B
650
100x2
6.5x
256KB
650
1.7V
23.8A
36.1W
0.18
37M
Jun. 2000
A0700APT3B
700
100x2
7x
256KB
700
1.7V
25.2A
38.3W
0.18
37M
Jun. 2000
A0750APT3B
750
100x2
7.5x
256KB
750
1.7V
26.6A
40.4W
0.18
37M
Jun. 2000
A0800APT3B
800
100x2
8x
256KB
800
1.7V
28.0A
42.6W
0.18
37M
Jun. 2000
A0850APT3B
850
100x2
8.5x
256KB
850
1.7V
29.4A
44.8W
0.18
37M
Jun. 2000
A0900AMT3B
900
100x2
9x
256KB
900
1.75V
31.7A
49.7W
0.18
37M
Jun. 2000
A0950AMT3B
950
100x2
9.5x
256KB
950
1.75V
33.2A
52.0W
0.18
37M
Jun. 2000
A1000AMT3B
1000
100x2
10x
256KB
1000
1.75V
34.6A
54.3W
0.18
37M
Jun. 2000
AMD is taking on Intel full force in the high-end market with the Athlon. It beat Intel to the 1GHz mark by introducing its 1GHz Athlon 2 days before Intel introduced the 1GHz Pentium III, and in most benchmarks the AMD Athlon compares as equal if not superior to the Intel Pentium III.
AMD Duron
The AMD Duron processor (code-named Spitfire) was announced in June 2000 and is a derivative of the AMD Athlon processor in the same fashion as the Celeron is a derivative of the Pentium II and III (see Figure 3.57). Basically the Duron is an Athlon with less L2 cache; all other capabilities are essentially the same. It is designed to be a lower-cost version with less cache, however only slightly less performance. In keeping with the low-cost theme, Duron contains 64KB on-die L2 cache and is designed for Socket-A, a socket version of the Athlon Slot-A. With the high-value design the Duron processor is expected to compete in the sub $1,000 PC market against the Celeron, just as the Athlon is designed to compete in the higher end Pentium III market.
Since the Duron processor is derived from the Athlon core it includes the Athlon 200MHz front-side system bus (interface to the chipset) as well as enhanced 3DNow instructions.
Figure 3.57 AMD Duron processor.
Table 3.42 shows information on the PGA (Pin Grid Array) or Socket A version of the AMD Athlon processor.
Table 3.42 AMD Duron Processor Information
Part Number
Speed (MHz)
Bus Speed (MHz)
Multiplier
L2 Cache
L2 Speed (MHz)
Voltage
Max. Current (A)
Max. Power (W)
Process (microns)
Transistors
Introduced
D0550AST1B
550
100x2
5.5x
64KB
550
1.5V
15.8A
21.1W
0.18
25M
Jun. 2000
D0600AST1B
600
100x2
6x
64KB
600
1.5V
17.0A
22.7W
0.18
25M
Jun. 2000
D0650AST1B
650
100x2
6.5x
64KB
650
1.5V
18.2A
24.3W
0.18
25M
Jun. 2000
D0700AST1B
700
100x2
7x
64KB
700
1.5V
19.2A
25.5W
0.18
25M
Jun. 2000
Cyrix MediaGX
The Cyrix MediaGX is designed for low-end sub-$1,000 retail store systems that must be highly integrated and low priced. The MediaGX integrates the sound, graphics, and memory control by putting these functions directly within the processor. With all these functions pulled "on chip," MediaGX-based PCs are priced lower than other systems with similar features.
The MediaGX processor integrates the PCI interface, coupled with audio, graphics, and memory-control functions, right into the processor unit. As such, a system with the MediaGX doesn't require a costly graphics or sound card. Not only that, but on the motherboard level, the MediaGX and its companion chip replace the processor, North and South Bridge chips, the memory control hardware, and L2 cache found on competitive Pentium boards. Finally, the simplified PC design of the MediaGX, along with its low-power and low-heat characteristics, allow the OEM PC manufacturer to design a system in a smaller form factor with a reduced power-supply requirement.
The MediaGX processor is not a Socket 7 processor; in fact, it does not go in a socket at all—it is permanently soldered into its motherboard. Because of the processor's high level of integration, motherboards supporting MediaGX processors and its companion chip (Cx5510) are of a different design than conventional Pentium boards. As such, a system with the MediaGX processor is more of a disposable system than an upgradable system. You will not be able to easily upgrade most components in the system, but that is often not important in the very low-end market. If upgradability is important, look elsewhere. On the other hand, if you need the lowest-priced system possible, one with the MediaGX might fill the bill.
The MediaGX is fully Windows-compatible and will run the same software as an equivalent Pentium. You can expect a MediaGX system to provide equivalent performance as a given Pentium system at the same megahertz. The difference with the MediaGX is that this performance level is achieved at a much lower cost. Because the MediaGX processor is soldered into the motherboard and requires a custom chipset, it is only sold in a complete motherboard form.
There is also an improved MMX-enhanced MediaGX processor that features MPEG1 support, Microsoft PC97 compliance for Plug-and-Play access, integrated game port control, and AC97 audio compliance. It supports Windows 95 and DOS-based games, and MMX software as well. Such systems will also include two universal serial bus (USB) ports, which will accommodate the new generation of USB peripherals such as printers, scanners, joysticks, cameras, and more.
The MediaGX processor is offered at 166 and 180MHz, while the MMX-enhanced MediaGX processor is available at 200MHz and 233MHz. Compaq is using the MMX-enhanced MediaGX processor in its Presario 1220 notebook PCs, which is a major contract win for Cyrix. Other retailers and resellers are offering low-end, low-cost systems in retail stores nationwide.
Cyrix/IBM 6x86 (M1) and 6x86MX (MII)
The Cyrix 6x86 processor family consists of the now-discontinued 6x86 and the newer 6x86MX processors. They are similar to the AMD-K5 and K6 in that they offer sixth-generation internal designs in a fifth-generation P5 Pentium compatible Socket 7 exterior.
The Cyrix 6x86 and 6x86MX (renamed MII) processors incorporate two optimized superpipelined integer units and an on-chip floating-point unit. These processors include the dynamic execution capability that is the hallmark of a sixth-generation CPU design. This includes branch prediction and speculative execution.
The 6x86MX/MII processor is compatible with MMX technology to run the latest MMX games and multimedia software. With its enhanced memory-management unit, a 64KB internal cache, and other advanced architectural features, the 6x86MX processor achieves higher performance and offers better value than competitive processors.
Features and benefits of the 6x86 processors include
Superscalar architecture. Two pipelines to execute multiple instructions in parallel.
Branch prediction. Predicts with high accuracy the next instructions needed.
Speculative execution. Allows the pipelines to continuously execute instructions following a branch without stalling the pipelines.
Out-of-order completion. Lets the faster instruction exit the pipeline out of order, saving processing time without disrupting program flow.
The 6x86 incorporates two caches: a 16KB dual-ported unified cache and a 256-byte instruction line cache. The unified cache is supplemented with a small quarter-K sized high-speed, fully associative instruction line cache. The improved 6x86MX design quadruples the internal cache size to 64KB, which significantly improves performance.
The 6x86MX also includes the 57 MMX instructions that speed up the processing of certain computing-intensive loops found in multimedia and communication applications.
All 6x86 processors feature support for System Management Mode (SMM). This provides an interrupt that can be used for system power management or software transparent emulation of I/O peripherals. Additionally, the 6x86 supports a hardware interface that allows the CPU to be placed into a low-power suspend mode.
The 6x86 is compatible with x86 software and all popular x86 operating systems, including Windows 95/98/Me, Windows NT/2000, OS/2, DOS, Solaris, and UNIX. Additionally, the 6x86 processor has been certified Windows 95 compatible by Microsoft.
As with the AMD-K6, there are some unique motherboard requirements for the 6x86 processors. Cyrix maintains a list of recommended motherboards on its Web site that should be consulted if you are considering installing one of these chips in a board.
When installing or configuring a system with the 6x86 processors, you have to set the correct motherboard bus speed and multiplier settings. The Cyrix processors are numbered based on a P-rating scale, which is not the same as the true megahertz clock speed of the processor.
See "Cyrix P-Ratings" earlier in this chapter to see the correct and true speed settings for the Cyrix 6x86 processors.
Note that because of the use of the P-rating system, the actual speed of the chip is not the same number at which it is advertised. For example, the 6x86MX-PR300 is not a 300MHz chip; it actually runs at only 263MHz or 266MHz, depending on exactly how the motherboard bus speed and CPU clock multipliers are set. Cyrix says it runs as fast as a 300MHz Pentium, hence the P-rating. Personally, I wish it would label the chips at the correct speed and then say that it runs faster than a Pentium at the same speed.
To install the 6x86 processors in a motherboard, you also have to set the correct voltage. Normally, the markings on top of the chip indicate which voltage setting is appropriate. Various versions of the 6x86 run at 3.52v (use VRE setting), 3.3v (VR setting), or 2.8v (MMX) settings. The MMX versions use the standard split-plane 2.8v core 3.3v I/O settings.
Itanium (P7/Merced) Seventh-Generation Processors
What is coming after the Pentium III? The next-generation processor was code-named either P7 or Merced and will be called Itanium.
Intel has indicated that the new 64-bit Itanium processor will be available in late 2000. The Itanium processor will be the first processor in Intel's IA-64 (Intel Architecture 64-bit) product family and will incorporate innovative performance-enhancing architecture techniques, such as prediction and speculation.
Itanium
The most current generation of processor is the P6, which was first seen in the Pentium Pro introduced in November of 1995 and most recently found in the latest Pentium II processors. Obviously, then, the next generation processor from Intel will be called the Itanium.
Intel's IA-64 product family is expected to expand the capabilities of the Intel architecture to address the high-performance server and workstation market segments. A variety of industry players—among them leading workstation and server-system manufacturers, leading operating system vendors, and dozens of independent software vendors—have already publicly committed their support for the Itanium processor and the IA-64 product family.
As with previous new processor introductions, the P7 will not replace the P6 or P5, at least not at first. It will feature an all new design that will be initially expensive and found only in the highest end systems such as file servers or workstations. Intel expects the Itanium will become the mainstream processor by the year 2004 and that the P6 will likely be found in low-end systems only. Intel is already developing an even more advanced P7 processor, due to ship in 2001, which will be significantly faster than Itanium.
Intel and Hewlett-Packard began jointly working on the P7 processor in 1994. It was then that they began a collaboration on what will eventually become Intel's next-generation CPU. Although we don't know exactly what the new CPU will be like, Intel has begun slowly releasing information about the new processor to prepare the industry for its eventual release. In October of 1997, more than three years after they first disclosed their plan to work together on a new microprocessor architecture, Intel and HP officially announced some of the new processor's technical details.
The first chip to implement the P7 architecture won't ship until late 2000.
Itanium will be the first microprocessor that will be based on the 64-bit, next-generation Intel architecture-64 (IA-64) specification. IA-64 is a completely different processor design, which will use Very Long Instruction Words (VLIW), instruction prediction, branch elimination, speculative loading, and other advanced processes for enhancing parallelism from program code. The new chip will feature elements of both CISC and RISC design.
There is also a new architecture Intel calls Explicitly Parallel Instruction Computing (EPIC), which will let the processor execute parallel instructions—several instructions at the same time. In the Itanium, three instructions will be encoded in one 128-bit word, so that each instruction has a few more bits than today's 32-bit instructions. The extra bits let the chip address more registers and tell the processor which instructions to execute in parallel. This approach simplifies the design of processors with many parallel-execution units and should let them run at higher clock rates. In other words, besides being capable of executing several instructions in parallel within the chip, the Itanium will have the capability to be linked to other Itanium chips in a parallel processing environment.
Besides having new features and running a completely new 64-bit instruction set, Intel and HP promise full backward compatibility between the Itanium, the current 32-bit Intel x86 software, and even HP's own PA-RISC software. The P7 will incorporate three different kinds of processors in one and therefore be capable of running advanced IA-64 parallel processing software and IA-32 Windows and HP-RISC UNIX programs at the same time. In this way, Itanium will support 64-bit instructions while retaining compatibility with today's 32-bit applications. This backward compatibility will be a powerful selling point.
To use the IA-64 instructions, programs will have to be recompiled for the new instruction set. This is similar to what happened in 1985, when Intel introduced the 80386, the first 32-bit PC processor. The 386 was to give IBM and Microsoft a platform for an advanced 32-bit operating system that tapped this new power. To ensure immediate acceptance, the 386 and future 32-bit processors still ran 16-bit code. To take advantage of the 32-bit capability first found in the 386, new software would have to be written. Unfortunately, software evolves much more slowly than hardware. It took Microsoft a full 10 years after the 386 debuted to release Windows 95, the first mainstream 32-bit operating system for Intel processors.
Intel claims that won't happen with the P7. Despite that, it will likely take several years before the software market shifts to 64-bit operating systems and software. The installed base of 32-bit processors is simply too great, and the backward compatible 32-bit mode of the P7 will allow it to run 32-bit software very well, because it will be done in the hardware rather than through software emulation.
Itanium will use 0.18 micron technology for the initial Merced chips. This will allow Itanium to pack many more transistors in the same space. Early predictions have the Itanium sporting 100 million transistors!
Intel's initial goal with IA-64 is to dominate the workstation and server markets, competing with chips such as the Digital Alpha, Sun Sparc, and Motorola PowerPC. Microsoft will provide a version of Windows NT that runs on the P7, and Sun plans to provide a version of Solaris, its UNIX operating-system software, to support Itanium as well. NCR has already announced that it will build Itanium-powered systems that use Solaris.
Itanium will be available in a new package called the Pin Array Cartridge (PAC). This cartridge will include cache and will plug into a socket on the motherboard and not a slot. The package is about the size of a standard index card, weighs about 6oz (170g) and has an alloy metal on its base to dissipate the heat. (See Figure 3.58.) Itanium has clips on its sides, allowing four to be hung from a motherboard, both below and above.
Figure 3.58 Itanium processor.
Itanium will have three levels of cache. The L1 cache will be closely tied to the execution unit. It will be backed by on-die L2 cache. Finally the multimegabyte L3 cache will be housed in separate chips contained within the cartridge.
Itanium will be followed in late 2001 by a second IA-64 processor code-named McKinley. McKinley will have larger on-die L2 cache and target clock speeds of more than 1.5GHz, offering more than twice the performance of Itanium, according to Intel reps. Following McKinley will be Madison, based on 0.13 micron technology. Both Itanium and McKinley are based on 0.18 micron technology.
Processor Upgrades
Since the 486, processor upgrades have been relatively easy for most systems. With the 486 and later processors, Intel designed in the capability to upgrade by designing standard sockets that would take a variety of processors. Thus, if you have a motherboard with Socket 3, you can put virtually any 486 processor in it; if you have a Socket 7 motherboard, it should be capable of accepting virtually any Pentium processor.
To maximize your motherboard, you can almost always upgrade to the fastest processor your particular board will support. Normally, that can be determined by the type of socket on the motherboard. Table 3.43 lists the fastest processor upgrade solution for a given processor socket.
Table 3.43 Maximum Processor Speeds by Socket
Socket Type
Fastest Processor Supported
Socket 1
5x86–133MHz with 3.3v adapter
Socket 2
5x86–133MHz with 3.3v adapter
Socket 3
5x86–133MHz
Socket 4
Pentium OverDrive 133MHz
Socket 5
Pentium MMX 233MHz or AMD-K6 with 2.8v adapter
Socket 7
AMD-K6-2, K6-3, up to 550MHz
Socket 8
Pentium Pro OverDrive (333MHz Pentium II performance)
Socket 370
Celeron 600MHz (66MHz bus)
Socket 370
Pentium III 850MHz (100MHz bus)
Socket 370
Pentium III 1000MHz (133MHz bus)
Slot 1
Celeron 600MHz (66MHz bus)
Slot 1
Pentium III 850MHz (100MHz bus)
Slot 1
Pentium III 1000MHz (133MHz bus)
Slot 2
Pentium III Xeon 550MHz (100MHz bus)
For example, if your motherboard has a Pentium Socket 5, you can install a Pentium MMX 233MHz processor with a 2.8v voltage regulator adapter, or optionally an AMD-K6, also with a voltage regulator adapter. If you have Socket 7, your motherboard should be capable of supporting the lower voltage Pentium MMX or AMD-K6 series directly without any adapters. The K6-2 and K6-3 are the fastest and best processors for Socket 7 motherboards.
Rather than purchasing processors and adapters separately, I normally recommend you purchase them together in a module from companies such as Kingston or Evergreen (see the Vendor List on the CD).
Upgrading the processor can, in some cases, double the performance of a system, such as if you were going from a Pentium 100 to an MMX 233. However, if you already have a Pentium 233, you already have the fastest processor that goes in that socket. In that case, you really should look into a complete motherboard change, which would let you upgrade to a Pentium II processor at the same time. If your chassis design is not proprietary and your system uses an industry standard Baby-AT or ATX motherboard design, I normally recommend changing the motherboard and processor rather than trying to find an upgrade processor that will work with your existing board.
OverDrive Processors
Intel at one time offered special OverDrive processors for upgrading systems. Often these were repackaged versions of the standard processors, sometimes including necessary voltage regulators and fans. Unfortunately they were normally overpriced, even when compared against purchasing a complete new motherboard and processor. They have all been withdrawn, and Intel has not announced any new versions. I normally don't recommend the OverDrive processors unless the deal is too good to pass up.
Processor Benchmarks
People love to know how fast (or slow) their computers are. We have always been interested in speed; it is human nature. To help us with this quest, various benchmark test programs can be used to measure different aspects of processor and system performance. Although no single numerical measurement can completely describe the performance of a complex device like a processor or a complete PC, benchmarks can be useful tools for comparing different components and systems.
However, the only truly accurate way to measure your system's performance is to test the system using the actual software applications you use. Though you think you might be testing one component of a system, often other parts of the system can have an effect. It is inaccurate to compare systems with different processors, for example, if they also have different amounts or types of memory, different hard disks, video cards, and so on. All these things and more will skew the test results.
Benchmarks can normally be divided into two kinds: component or system tests. Component benchmarks measure the performance of specific parts of a computer system, such as a processor, hard disk, video card, or CD-ROM drive, while system benchmarks typically measure the performance of the entire computer system running a given application or test suite.
Benchmarks are, at most, only one kind of information that you can use during the upgrading or purchasing process. You are best served by testing the system using your own set of software operating systems and applications and in the configuration you will be running.
There are several companies that specialize in benchmark tests and software. The following table lists the company and the benchmarks they are known for. You can contact these companies via the information in the Vendor List on the CD.
Company
Benchmarks Published
Benchmark Type
Intel
iCOMP index 3.0
Processor
Intel
iCOMP index 3.0
System Intel Media Benchmark
Business Applications
SYSmark/NT
System
Performance Corporation
(BAPCo)
Business Applications
SYSmark/NT, SYSmark95
System
Performance Corporation for Windows
(BAPCo)
Standard Performance
SPECint95
Processor
Evaluation Corporation
(SPEC)
Standard Performance
SPECint95,
Processor
Evaluation Corporation
SPECfp95
(SPEC)
Ziff-Davis Benchmark
CPUmark32
Processor Operation
Ziff-Davis Benchmark
Winstone 98
System Operation
Ziff-Davis Benchmark
WinBench 98
System Operation
Ziff-Davis Benchmark
CPUmark32, Winstone 98, WinBench 98, 3D WinBench 98
System Operation
Symantec Corporation
Norton SI32
Processor
Symantec Corporation
Norton SI32,
System
Norton Multimedia
Benchmark
